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4 Commits

Author SHA1 Message Date
Lily Tsuru aa66a1ff2e riscv: Implement partial CLINT and SYSCON. 2023-07-22 22:43:49 -04:00
Lily Tsuru 8eaf05a8ac riscv: Heavy bus refactor. 
It now doesn't assume literally every device would map something to memory.

This should also fix some API orthogonality issues (ergo the CPU being treated specially)
 2023-07-21 06:32:04 -04:00
Lily Tsuru 9d7ef71d3b RamDevice is public 
start skeleton gmod module
 2023-07-18 02:05:39 -04:00
Lily Tsuru b4a343e9db move all native projects to native/projects 
this should make the folder structure a bit more navigatable
 2023-07-16 05:46:49 -04:00
Renamed from native/riscv/CMakeLists.txt (Browse further)