History

Lily Tsuru 6ebebae770 Use an output iterator for the lucore stdout sink		2023-07-18 00:47:10 -04:00
..
include/riscv	Use an output iterator for the lucore stdout sink	2023-07-18 00:47:10 -04:00
src	Use an output iterator for the lucore stdout sink	2023-07-18 00:47:10 -04:00
CMakeLists.txt	move all native projects to native/projects	2023-07-16 05:46:49 -04:00
README.md	move all native projects to native/projects	2023-07-16 05:46:49 -04:00

README.md

riscv

This is the RISC-V emulation core that LCPU uses in its native emulation module.

This is based off cnlohr/mini-rv32ima, but:

Rewritten in C++20 (because I like sanity)
Cleaned up somewhat
Moved ALL device and MMIO code to seperate interfaces
- Re-implemented the timer device and the UART as said oop interface
  - Lua devices use a wrapper which can contain lua callbacks