gmod-lcpu/native/riscv
Lily Tsuru c20c852554 lucore now has its own assertion system
ripped off of how ive done it in like 10 different projects by now™️
2023-07-16 05:40:38 -04:00
..
include/riscv chore: remove vector bsearch code, seperate OptionalRef 2023-07-16 02:15:55 -04:00
src lucore now has its own assertion system 2023-07-16 05:40:38 -04:00
CMakeLists.txt lucore now has its own assertion system 2023-07-16 05:40:38 -04:00
README.md init 2023-07-16 01:58:32 -04:00

README.md

riscv

This is the RISC-V emulation core that LCPU uses in its native emulation module.

This is based off cnlohr/mini-rv32ima, but:

  • Rewritten in C++20 (because I like sanity)
  • Cleaned up somewhat
  • Moved ALL device and MMIO code to seperate interfaces
    • Re-implemented the timer device and the UART as said oop interface
      • Lua devices use a wrapper which can contain lua callbacks