rom: an attempt at IOP stuff
it seems multiple source files for each part break, and I don't quite know why
This commit is contained in:
parent
bdeb32b11c
commit
8ba1161404
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@ -0,0 +1,46 @@
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# .clang-format for native code portion
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BasedOnStyle: Google
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# force T* or T&
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DerivePointerAlignment: false
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PointerAlignment: Left
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TabWidth: 4
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IndentWidth: 4
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UseTab: Always
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IndentPPDirectives: BeforeHash
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AllowAllParametersOfDeclarationOnNextLine: true
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AllowShortBlocksOnASingleLine: false
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AllowShortFunctionsOnASingleLine: InlineOnly
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AllowShortIfStatementsOnASingleLine: Never
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AllowShortLoopsOnASingleLine: false
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AllowShortCaseLabelsOnASingleLine: true
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BinPackArguments: true
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BinPackParameters: true
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BreakConstructorInitializers: BeforeColon
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BreakStringLiterals: false
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ColumnLimit: 150
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CompactNamespaces: false
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ConstructorInitializerAllOnOneLineOrOnePerLine: true
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ContinuationIndentWidth: 0
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# turning this on causes major issues with initializer lists
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Cpp11BracedListStyle: false
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SpaceBeforeCpp11BracedList: true
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FixNamespaceComments: true
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NamespaceIndentation: All
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ReflowComments: true
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SortIncludes: CaseInsensitive
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SortUsingDeclarations: true
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SpacesInSquareBrackets: false
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SpaceBeforeParens: Never
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SpacesBeforeTrailingComments: 1
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@ -1,2 +1,4 @@
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bin/
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bin/
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**/obj
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**/obj
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/.cache
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/compile_commands.json
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7
Makefile
7
Makefile
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@ -1,4 +1,4 @@
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.PHONY: all copy clean
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.PHONY: all copy clean bear
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TOP=$(shell pwd)
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TOP=$(shell pwd)
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@ -9,10 +9,12 @@ endif
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all:
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all:
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make -C rom/ee TOP=$(TOP) CONFIG=$(CONFIG)
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make -C rom/ee TOP=$(TOP) CONFIG=$(CONFIG)
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make -C rom/iop TOP=$(TOP) CONFIG=$(CONFIG)
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make -C rom TOP=$(TOP) CONFIG=$(CONFIG)
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make -C rom TOP=$(TOP) CONFIG=$(CONFIG)
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clean:
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clean:
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make -C rom/ee TOP=$(TOP) CONFIG=$(CONFIG) clean
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make -C rom/ee TOP=$(TOP) CONFIG=$(CONFIG) clean
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make -C rom/iop TOP=$(TOP) CONFIG=$(CONFIG) clean
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make -C rom TOP=$(TOP) CONFIG=$(CONFIG) clean
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make -C rom TOP=$(TOP) CONFIG=$(CONFIG) clean
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# copy to PCSX2 BIOS root
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# copy to PCSX2 BIOS root
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@ -21,3 +23,6 @@ clean:
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# ROMDIR (and the BIOS selection menu only shows ROMs with a ROMDIR)
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# ROMDIR (and the BIOS selection menu only shows ROMs with a ROMDIR)
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copy:
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copy:
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cp bin/ps2rom_$(CONFIG).rom ~/.config/PCSX2/bios
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cp bin/ps2rom_$(CONFIG).rom ~/.config/PCSX2/bios
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bear:
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bear -- $(MAKE) CONFIG=$(CONFIG)
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@ -29,6 +29,8 @@ OBJECTS := $(patsubst %.c,obj/$(CONFIG)/%.o,$(filter %.c,$(SRCS)))
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OBJECTS += $(patsubst %.cpp,obj/$(CONFIG)/%.o,$(filter %.cpp,$(SRCS)))
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OBJECTS += $(patsubst %.cpp,obj/$(CONFIG)/%.o,$(filter %.cpp,$(SRCS)))
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OBJECTS += $(patsubst %.s,obj/$(CONFIG)/%.o,$(filter %.s,$(SRCS)))
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OBJECTS += $(patsubst %.s,obj/$(CONFIG)/%.o,$(filter %.s,$(SRCS)))
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CFLAGS := $(CFLAGS) $(INCS)
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# include target-specific recipies specifying how to
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# include target-specific recipies specifying how to
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# build for the target.
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# build for the target.
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include $(TOP)/build/targets/$(TARGET).mk
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include $(TOP)/build/targets/$(TARGET).mk
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10
rom/Makefile
10
rom/Makefile
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NAME=ps2rom
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NAME=ps2rom
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TARGET=iop
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TARGET=ee
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KIND=bin
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KIND=bin
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SELF=$(shell pwd)
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SELF=$(shell pwd)
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@ -11,7 +11,9 @@ LDFLAGS = -nostartfiles -nodefaultlibs -Wl,-Map,$(BINDIR)/$(FINALNAME).map -T$(S
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# Link to each portion of the ROM codebase. For now,
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# Link to each portion of the ROM codebase. For now,
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# this will only link to the EE ROM codebase.
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# this will only link to the EE ROM codebase.
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LIBS=-lps2rom_ee_$(CONFIG)
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LIBS=-lps2rom_ee_$(CONFIG)
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#-lps2rom_iop_$(CONFIG)
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# sources
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# sources
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SRCS = rom_start.s
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SRCS = rom_start.s
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@ -30,6 +32,10 @@ $(BINDIR)/:
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$(OBJDIR)/:
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$(OBJDIR)/:
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mkdir -p $@
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mkdir -p $@
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# make sure to assemble the primary ROM start routine
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# as MIPS-I, so that we don't get into any issues.
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$(OBJDIR)/rom_start.o: AS += -march=r3000
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$(BINDIR)/$(FINALNAME).rom: $(BINDIR)/$(FINALNAME).elf
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$(BINDIR)/$(FINALNAME).rom: $(BINDIR)/$(FINALNAME).elf
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$(OBJCOPY) -O binary $< $@
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$(OBJCOPY) -O binary $< $@
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@ -9,6 +9,7 @@ CXXFLAGS = -fno-exceptions -fno-rtti
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# sources
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# sources
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SRCS = _ee_start.s \
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SRCS = _ee_start.s \
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ee_sio.c \
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ee_start.c
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ee_start.c
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.PHONY: all clean clean-products
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.PHONY: all clean clean-products
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//! EE SIO implementation
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#include <shared/sio.h>
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void SIO_putc(char c) {
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*((char*)0x1000f180) = c;
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}
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void SIO_puts(const char* s) {
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while(*s)
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SIO_putc(*s++);
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}
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#include "shared/sio.h"
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#define __noreturn __attribute__((noreturn))
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#include "shared/attributes.h"
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static void putc(char c) {
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*((char*)0x1000f180) = c;
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}
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static void puts(const char* s) {
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while (*s)
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putc(*s++);
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}
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__noreturn void _ee_start() {
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__noreturn void _ee_start() {
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puts("EE: Hello World from Lily~\n");
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SIO_puts("EE: Hello World from Lily~\n");
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while(1);
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while(1)
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;
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}
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}
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NAME=ps2rom_iop
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TARGET=iop
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KIND=lib
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INCS = -I$(TOP)/rom
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CFLAGS = -ffreestanding -fno-stack-protector
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CXXFLAGS = -fno-exceptions -fno-rtti
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# sources
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SRCS = _iop_start.s \
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iop_sio.c \
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iop_start.c
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.PHONY: all clean clean-products
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include $(TOP)/build/core.mk
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all: $(BINDIR)/lib$(FINALNAME).a
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$(BINDIR)/:
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mkdir -p $@
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$(OBJDIR)/:
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mkdir -p $@
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clean: clean-products
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include $(TOP)/build/products/$(KIND).mk
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.set noat
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.globl _iop_start
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.extern iop_start
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// __noreturn __naked void _iop_start()
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// This is the primary entrypoint for the IOP code
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_iop_start:
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li $sp, 0x001fffc0 // temporary stack (2<<20-0x40)
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move $fp, $sp
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j iop_start
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//! IOP SIO implementation
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#include <shared/sio.h>
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void SIO_putc(char c) {
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*((char*)0x1f80380c) = c;
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}
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void SIO_puts(const char* s) {
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while(*s)
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SIO_putc(*s++);
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}
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#include "shared/attributes.h"
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#include "shared/sio.h"
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__noreturn void _iop_start() {
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// setup iop
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*(char*)0xbf802070 = 9;
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// Poke around with the cache control registers
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//
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*(int*)0xfffe0130 = 0xcc4;
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*(int*)0xfffe0130 = 0xcc0;
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// it seems like if bit 8 is set here,
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// then the cache control is set nearly
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// exactly like the PS1 kernel did
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if((*(int*)0xbf801450) & 8)
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*(int*)0xfffe0130 = 0x1e988;
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else
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*(int*)0xfffe0130 = 0x1edd8;
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SIO_puts("IOP: Hello World from Lily~\n");
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while(1)
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;
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}
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13
rom/link.ld
13
rom/link.ld
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_stack_size = 0x80000;
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_stack_size = 0x80000;
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_heap_size = 1024*1024*10;
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_heap_size = 1024*1024*10;
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_text_origin = 0xbfc00000;
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ENTRY(_start);
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ENTRY(_start);
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SECTIONS {
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SECTIONS {
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.text 0xbfc00000 : {
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. = 0xbfc00000;
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_text_origin = .;
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*start.o /* Always link reset first */
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.text : {
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*rom_start.o /* Always link reset as the first object */
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*(libps2rom_ee_*.a)
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*(libps2rom_iop_*.a)
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*(.text)
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*(.text)
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*(.rodata)
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*(.rodata)
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*(.rodata.*)
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}
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}
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_text_size = . - _text_origin;
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_text_size = . - _text_origin;
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.org 0
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.org 0
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.set noat
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.set noat
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// externs
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// externs from each piece of the code
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.extern _ee_start
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.extern _ee_start
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.extern _iop_start
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.globl _start
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.globl _start
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_start:
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_start:
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nop
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nop
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j _ee_start // Call EE start routine
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j _ee_start // Call EE start routine
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nop
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nop
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__iop: // for now the iop stalls.
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__iop:
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j __iop
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j __iop
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//j _iop_start // Call IOP start routine
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//nop
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#define __noreturn __attribute__((noreturn))
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#ifndef SIO_H
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#define SIO_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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void SIO_putc(char c);
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void SIO_puts(const char* s);
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#ifdef __cplusplus
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}
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#endif
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#endif
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