386 lines
10 KiB
NASM
386 lines
10 KiB
NASM
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;
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;;; Microsoft Research Singularity
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;;;
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;;; Copyright (c) Microsoft Corporation. All rights reserved.
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;;;
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;;; This file contains ARM-specific assembly code.
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;;;
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; format_e.s
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;
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; Copyright (C) Advanced RISC Machines Limited, 1994. All rights reserved.
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;
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; RCS Revision: 1
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; Checkin Date: 2007/06/29 02:59:16
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; Revising Author
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GET fpe.asm
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AREA |.text|, CODE, READONLY
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SNaNInf EQU NaNInfExp_Single - EIExp_bias + SExp_bias
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DNaNInf EQU NaNInfExp_Double - EIExp_bias + DExp_bias
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;==============================================================================
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[ :DEF: e2e_s
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EXPORT _e2e
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; Convert a five-word internal value to a three word value
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;
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; Enters with the partly-constructed internal precision value in OP1sue,
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; OP1mhi and OP1mlo, the exponent in RNDexp and the guard/sticky bits in
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; Rarith. No truncation is needed, only rounding.
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[ :DEF: thumb
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CODE32
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]
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_e2e
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TST OP1sue,#Error_bit+Uncommon_bit
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BNE _e2e_error_or_uncommon
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MOVS Rtmp,Rarith,LSL #1 ;C<-round, Z<-"tied (or exact) case"
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BEQ _e2e_exact_or_tied
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_e2e_round_by_C
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ADDCSS OP1mlo,OP1mlo,#1 ;Increment low word
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ADDCSS OP1mhi,OP1mhi,#1 ;If carry out, increment high word
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MOVCS OP1mhi,#EIUnits_bit ;If mantissa overflow, adjust
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ADCS RNDexp,RNDexp,#0 ; mantissa and exponent
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BMI _e2e_underflow
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;Check for overflow in the usual way
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ADD tmp,RNDexp,#1
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BIC tmp,tmp,#Uncommon_bit
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CMP tmp,#1<<EIExp_len
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MOVGT a4,#OVF_bits
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_e2e_return_value
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AND OP1sue,OP1sue,#Sign_bit
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ORR OP1sue,RNDexp,OP1sue
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MOV pc, lr ;Only *ever* called from ARM
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;So no INTERWORK hacks needed!
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;In the event of an error just return
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_e2e_error_or_uncommon
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MOV a4,OP1sue
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MOV pc,lr
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_e2e_exact_or_tied
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MOVCSS Rtmp,OP1mlo,LSR #1 ;If "tied" C<-low mantissa bit
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B _e2e_round_by_C ;(If exact, C remains 0)
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_e2e_underflow
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;We have come out with a negative exponent. If the units bit is unset this
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;may be recoverable.
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TST OP1mhi,#EIUnits_bit
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BNE _e2e_underflow_recover
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_e2e_massive_underflow
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;It is not - i.e. this is a normalised number. We return a signed zero.
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MOV OP1mhi,#0
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MOV OP1mlo,#0
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AND OP1sue,OP1sue,#Sign_bit
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MOV a4, #0
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MOV pc,lr
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_e2e_underflow_recover
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;We may be able to shift the mantissa enough to bring the exponent back
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;into range.
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MACRO
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I2ECheckBits $n
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MOVS tmp,OP1mhi,LSR #32-$n
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MOVEQ tmp,OP1mlo,LSR #32-$n
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ORREQ OP1mhi,tmp,OP1mhi,LSL #$n
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ADDEQ RNDexp,RNDexp,#$n
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MEND
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I2ECheckBits 16
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I2ECheckBits 8
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I2ECheckBits 4
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I2ECheckBits 2
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I2ECheckBits 1
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MOVS RNDexp,RNDexp
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BMI _e2e_massive_underflow
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BPL _e2e_return_value
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]
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;===========================================================================
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[ :DEF: eflt_s :LOR: :DEF: efltu_s
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;Macro for normalisation
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MACRO
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ExtendNormalise
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;The sign bit is stored in OP1sue.
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ORR OP1sue,OP1sue,#((EIExp_bias+31):AND:&ff00)<<EIExp_pos
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ORR OP1sue,OP1sue,#((EIExp_bias+31):AND:&00ff)<<EIExp_pos
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;Now that we have the basis for the exponent, we do the rounding
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MOVS tmp,OP1mhi,LSR #16
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MOVEQ OP1mhi,OP1mhi,LSL #16
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SUBEQ OP1sue,OP1sue,#16<<EIExp_pos
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MOVS tmp,OP1mhi,LSR #24
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MOVEQ OP1mhi,OP1mhi,LSL #8
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SUBEQ OP1sue,OP1sue,#8<<EIExp_pos
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MOVS tmp,OP1mhi,LSR #28
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MOVEQ OP1mhi,OP1mhi,LSL #4
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SUBEQ OP1sue,OP1sue,#4<<EIExp_pos
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MOVS tmp,OP1mhi,LSR #30
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MOVEQ OP1mhi,OP1mhi,LSL #2
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SUBEQ OP1sue,OP1sue,#2<<EIExp_pos
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MOVS tmp,OP1mhi,LSR #31
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MOVEQ OP1mhi,OP1mhi,LSL #1
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SUBEQ OP1sue,OP1sue,#1<<EIExp_pos
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;We want to keep the units bit, which now must be in the top bit of a1.
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MEND
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]
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;..............................................................................
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[ :DEF: eflt_s
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EXPORT _eflt
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_eflt EnterWithLR
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MOVS OP1mhi,a1 ;Check for zero and -ve; put in place
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AND OP1sue,a1,#Sign_bit ;Extract sign
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RSBMI OP1mhi,OP1mhi,#0 ;Undo two's complement
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ASSERT OP1sue = a1
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MOV OP1mlo,#0 ;This will be done regardless
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;MOVEQ OP1sue,#0 ;Return a zero as appropiate
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;MOVEQ OP1mhi,#0 ;Already done this move
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ReturnToLR EQ
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ExtendNormalise
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ReturnToLR
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]
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;------------------------------------------------------------------------------
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[ :DEF: efltu_s
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EXPORT _efltu
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_efltu EnterWithLR
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MOVS OP1mhi,a1 ;Check for zero and -ve; put in place
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MOV OP1mlo,#0 ;This will be done regardless
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MOV OP1sue,#0 ;Return a zero as appropiate
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;MOVEQ OP1mhi,#0 ;Already done this move
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ReturnToLR EQ
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ExtendNormalise
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ReturnToLR
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]
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;---------------------------------------------------------------------------
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[ :DEF: norm_op1_s
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EXPORT __fp_norm_op1
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; This routine is called to normalised the first operand on entry to one
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; of the veneered functions.
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; Takes OP1 is r0,r1,r2 and corrupts tmp (r11).
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;Called from ARM code
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[ :DEF: thumb
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CODE32
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]
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__fp_norm_op1
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TST OP1mhi, #EIUnits_bit
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MOVEQ pc, lr ;Only ever called from ARM - so
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;no INTERWORK hacks needed
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STMFD r13!,{RNDexp,lr}
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BICS OP1mhi,OP1mhi,#Sign_bit
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BEQ __fp_denorm_low
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; The top set bit in the high word, so find out how much to denormalise
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; by
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MOVS RNDexp,OP1mhi,LSR #16
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MOVEQ OP1mhi,OP1mhi,LSL #16
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MOVEQ tmp,#16
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MOVNE tmp,#0
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MOVS RNDexp,OP1mhi,LSR #24
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MOVEQ OP1mhi,OP1mhi,LSL #8
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ADDEQ tmp,tmp,#8
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MOVS RNDexp,OP1mhi,LSR #28
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MOVEQ OP1mhi,OP1mhi,LSL #4
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ADDEQ tmp,tmp,#4
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MOVS RNDexp,OP1mhi,LSR #30
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MOVEQ OP1mhi,OP1mhi,LSL #2
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ADDEQ tmp,tmp,#2
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MOVS RNDexp,OP1mhi,LSR #31
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MOVEQ OP1mhi,OP1mhi,LSL #1
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ADDEQ tmp,tmp,#1
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; tmp now contains the amount to shift by.
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RSB RNDexp,tmp,#32
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ORR OP1mhi,OP1mhi,OP1mlo,LSR RNDexp
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MOV OP1mlo,OP1mlo,LSL tmp
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SUB OP1sue,OP1sue,tmp
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ADD OP1sue,OP1sue,#1
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LDMFD r13!,{RNDexp,pc}
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__fp_denorm_low
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; The top bit to be set is in OP1mlo
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MOVS RNDexp,OP1mlo,LSR #16
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MOVEQ OP1mlo,OP1mlo,LSL #16
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MOVEQ tmp,#16
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MOVNE tmp,#0
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MOVS RNDexp,OP1mlo,LSR #24
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MOVEQ OP1mlo,OP1mlo,LSL #8
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ADDEQ tmp,tmp,#8
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MOVS RNDexp,OP1mlo,LSR #28
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MOVEQ OP1mlo,OP1mlo,LSL #4
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ADDEQ tmp,tmp,#4
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MOVS RNDexp,OP1mlo,LSR #30
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MOVEQ OP1mlo,OP1mlo,LSL #2
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ADDEQ tmp,tmp,#2
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MOVS RNDexp,OP1mlo,LSR #31
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MOVEQ OP1mlo,OP1mlo,LSL #1
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ADDEQ tmp,tmp,#1
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; tmp now contains the amount to shift by.
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MOV OP1mhi,OP1mlo
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MOV OP1mlo,#0
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SUB OP1sue,OP1sue,#31
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SUB OP1sue,OP1sue,tmp
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LDMFD r13!,{RNDexp,pc}
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]
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;---------------------------------------------------------------------------
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[ :DEF: norm_op2_s
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EXPORT __fp_norm_op2
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; This routine is called to normalised the second operand on entry to one
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; of the veneered functions.
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; takes OP2 in r4,r5,r6 and corrupts tmp (r11)
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; Called from ARM code
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[ :DEF: thumb
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CODE32
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]
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__fp_norm_op2
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TST OP2mhi, #EIUnits_bit
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MOVEQ pc, lr
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STMFD r13!,{OP1sue,lr}
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BICS OP2mhi,OP2mhi,#Sign_bit
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BEQ __fp_denorm_low
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; The top set bit in the high word, so find out how much to denormalise
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; by
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MOVS OP1sue,OP2mhi,LSR #16
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MOVEQ OP2mhi,OP2mhi,LSL #16
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MOVEQ tmp,#16
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MOVNE tmp,#0
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MOVS OP1sue,OP2mhi,LSR #24
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MOVEQ OP2mhi,OP2mhi,LSL #8
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ADDEQ tmp,tmp,#8
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MOVS OP1sue,OP2mhi,LSR #28
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MOVEQ OP2mhi,OP2mhi,LSL #4
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ADDEQ tmp,tmp,#4
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MOVS OP1sue,OP2mhi,LSR #30
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MOVEQ OP2mhi,OP2mhi,LSL #2
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ADDEQ tmp,tmp,#2
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MOVS OP1sue,OP2mhi,LSR #31
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MOVEQ OP2mhi,OP2mhi,LSL #1
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ADDEQ tmp,tmp,#1
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; tmp now contains the amount to shift by.
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RSB OP1sue,tmp,#32
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ORR OP2mhi,OP2mhi,OP2mlo,LSR OP1sue
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MOV OP2mlo,OP2mlo,LSL tmp
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SUB OP2sue,OP2sue,tmp
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ADD OP2sue,OP2sue,#1
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LDMFD r13!,{OP1sue,pc}
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__fp_denorm_low
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; The top bit to be set is in OP2mlo
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MOVS OP1sue,OP2mlo,LSR #16
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MOVEQ OP2mlo,OP2mlo,LSL #16
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MOVEQ tmp,#16
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MOVNE tmp,#0
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MOVS OP1sue,OP2mlo,LSR #24
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MOVEQ OP2mlo,OP2mlo,LSL #8
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ADDEQ tmp,tmp,#8
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MOVS OP1sue,OP2mlo,LSR #28
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MOVEQ OP2mlo,OP2mlo,LSL #4
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ADDEQ tmp,tmp,#4
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MOVS OP1sue,OP2mlo,LSR #30
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MOVEQ OP2mlo,OP2mlo,LSL #2
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ADDEQ tmp,tmp,#2
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MOVS OP1sue,OP2mlo,LSR #31
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MOVEQ OP2mlo,OP2mlo,LSL #1
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ADDEQ tmp,tmp,#1
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; tmp now contains the amount to shift by.
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MOV OP2mhi,OP2mlo
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MOV OP2mlo,#0
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SUB OP2sue,OP2sue,#31
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SUB OP2sue,OP2sue,tmp
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LDMFD r13!,{OP1sue,pc}
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]
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||
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;---------------------------------------------------------------------------
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||
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||
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END
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