721 lines
28 KiB
C#
721 lines
28 KiB
C#
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////////////////////////////////////////////////////////////////////////////////
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//
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// Microsoft Research Singularity
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//
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// Copyright (c) Microsoft Corporation. All rights reserved.
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//
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// File: IdeController.cs
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//
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// Base Classes and Interfaces for interacting with ATA
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//
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// References used:
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// "AT Attachment Interface with Extension (ATA-2)", Revision 4c, DRAFT
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// 09/03/97, ISO Working Group T13, http://www.t13.org/
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//
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// "AT Attachment 8 - ATA/ATAPI Command Set (ATA8-ACS)", Revision 0, DRAFT
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// 08/17/04, ISO Working Group T13, http://www.t13.org/
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//
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#define DEBUG_SHARED_IRQ
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using System;
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using System.Collections;
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using System.Text;
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using System.Threading;
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using Microsoft.SingSharp;
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using Microsoft.Singularity;
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using Microsoft.Singularity.Io;
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using Microsoft.Singularity.Channels;
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using Microsoft.Singularity.Drivers.IDE;
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using Microsoft.Singularity.V1.Services;
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namespace Microsoft.Singularity.Drivers.IDE
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{
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public enum IdeSet
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{
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IDE_SET_READ_AHEAD = 0,
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IDE_UNSET_READ_AHEAD,
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IDE_SET_MULTIPLE,
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IDE_SET_NO_REVERT,
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IDE_SET_WRITE_CACHE,
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IDE_SET_MAX_PIO,
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IDE_SET_MAX_UDMA,
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};
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[CLSCompliant(false)]
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public class IdeController
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{
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public const int PollLoopCount = 10000;
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public string! ControllerNameInternal;
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private bool busMasterDmaAvailable;
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private IoPort[]! CommandBlock;
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private IoPort[]! ControlBlock;
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private IdeConfig! ideConfigHandle;
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private String! instanceName;
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private IdeDiskConfig ideDisk1Config;
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private IdeDiskConfig ideDisk2Config;
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private Thread irqWorker;
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private bool irqWorkerStop;
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private bool initialized;
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private volatile bool commandPending = false;
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private volatile bool identifyPending = false;
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private byte pollStatus = 0;
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private int cyclesPerReadStatus;
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private int delay400ns;
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public volatile bool CatchBug;
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public volatile int CatchCount;
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public string ControllerName
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{
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get { return ControllerNameInternal; }
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}
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public void SetCommandPending(bool val)
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{
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commandPending = val;
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//Tracing.Log(Tracing.Debug," Command pending set to {0}", commandPending ? "true" : "false");
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}
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public IdeConfig GetConfig()
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{
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return ideConfigHandle;
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}
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public bool GetCommandPending()
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{
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//Tracing.Log(Tracing.Debug," Command pending set to {0}", commandPending ? "true" : "false");
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return commandPending;
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}
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public void SetIdentifyInProgress(bool value)
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{
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identifyPending = value;
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}
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public bool GetIdentifyInProgress()
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{
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return identifyPending;
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}
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public ushort ReadDataPort()
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{
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return ((!)CommandBlock[0]).Read16();
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}
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public void WriteDataPort(ushort value)
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{
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((!)CommandBlock[0]).Write16(value);
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}
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public byte ReadErrorPort()
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{
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return ((!)CommandBlock[1]).Read8();
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}
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public void WriteFeaturesPort(byte value)
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{
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((!)CommandBlock[1]).Write8(value);
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}
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public byte ReadSectorCountPort()
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{
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return ((!)CommandBlock[2]).Read8();
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}
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public void WriteSectorCountPort(byte value)
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{
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((!)CommandBlock[2]).Write8(value);
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}
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public byte ReadLBALowPort()
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{
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return ((!)CommandBlock[3]).Read8();
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}
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public void WriteLBALowPort(byte value)
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{
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((!)CommandBlock[3]).Write8(value);
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}
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public byte ReadLBAMidPort()
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{
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return ((!)CommandBlock[4]).Read8();
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}
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public void WriteLBAMidPort(byte value)
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{
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((!)CommandBlock[4]).Write8(value);
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}
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public byte ReadLBAHighPort()
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{
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return ((!)CommandBlock[5]).Read8();
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}
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public void WriteLBAHighPort(byte value)
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{
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((!)CommandBlock[5]).Write8(value);
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}
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public byte ReadDeviceHeadPort()
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{
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return ((!)CommandBlock[6]).Read8();
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}
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public void WriteDeviceHeadPort(byte value)
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{
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((!)CommandBlock[6]).Write8(value);
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}
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public byte ReadStatusPort()
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{
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return ((!)CommandBlock[7]).Read8();
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}
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public int ReadFullStatus()
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{
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byte nStatus = ReadAlternateStatusPort();
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if ((nStatus & (byte)ATA6.IdeStatus.ERR) > 0) {
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return (int)(nStatus | (((int)ReadErrorPort()) << 8));
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}
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return (int)nStatus;
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}
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public void WriteCommandPort(byte value)
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{
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((!)CommandBlock[7]).Write8(value);
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}
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public byte ReadAlternateStatusPort()
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{
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return ((!)ControlBlock[2]).Read8();
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}
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public void WriteControlPort(byte value)
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{
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((!)ControlBlock[2]).Write8(value);
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}
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#if false
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public IoPort DataPort;
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public IoPort ErrorPort;
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public IoPort SectorCountPort;
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public IoPort LBAlowPort;
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public IoPort LBAmidPort;
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public IoPort LBAhighPort;
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public IoPort DeviceHeadPort;
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public IoPort StatusPort;
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public IoPort CommandPort;
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#endif
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private IdeController(DiskResources! resources, string! instanceName)
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{
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DebugStub.Print("Entering IdeController\n");
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delay400ns = CalculateDelay400nsCount();
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this.ideConfigHandle = new IdeConfig(resources.irq,
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resources.command,
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resources.control,
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true,
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resources.dma,
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this);
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this.instanceName = instanceName;
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IoPort[]! CommandBlock = this.CommandBlock = new IoPort[8];
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IoPort[]! ControlBlock = this.ControlBlock = new IoPort[8];
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ControllerNameInternal = String.Empty;
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IoPortRange commandPorts = resources.command;
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IoPortRange controlPorts = resources.control;
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CommandBlock[0] = commandPorts.PortAtOffset(0, 2, Access.ReadWrite); //Data Port 16bits
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CommandBlock[1] = commandPorts.PortAtOffset(1, 1, Access.ReadWrite); //Error Port
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CommandBlock[2] = commandPorts.PortAtOffset(2, 1, Access.ReadWrite); //SectorCount
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CommandBlock[3] = commandPorts.PortAtOffset(3, 1, Access.ReadWrite); //LBA low
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CommandBlock[4] = commandPorts.PortAtOffset(4, 1, Access.ReadWrite); //LBA mid
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CommandBlock[5] = commandPorts.PortAtOffset(5, 1, Access.ReadWrite); //LBA high
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CommandBlock[6] = commandPorts.PortAtOffset(6, 1, Access.ReadWrite); //DeviceHead
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CommandBlock[7] = commandPorts.PortAtOffset(7, 1, Access.ReadWrite); //Status & command
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/*
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DataPort = commandPorts.PortAtOffset(0, 2, Access.ReadWrite); //Data Port 16bits
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ErrorPort = commandPorts.PortAtOffset(1, 1, Access.Read); //Error Port
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SectorCountPort = commandPorts.PortAtOffset(2, 1, Access.ReadWrite); //SectorCount
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LBAlowPort = commandPorts.PortAtOffset(3, 1, Access.ReadWrite); //LBA low
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LBAmidPort = commandPorts.PortAtOffset(4, 1, Access.ReadWrite); //LBA mid
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LBAhighPort = commandPorts.PortAtOffset(5, 1, Access.ReadWrite); //LBA high
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DeviceHeadPort = commandPorts.PortAtOffset(6, 1, Access.ReadWrite); //DeviceHead
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StatusPort = commandPorts.PortAtOffset(7, 1, Access.Read); //Status
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CommandPort commandPorts.PortAtOffset(7, 1, Access.Write); //Command
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*/
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ControlBlock[2] = controlPorts.PortAtOffset(2, 2, Access.ReadWrite);
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}
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internal static IdeController! Create(DiskResources! resources, string! instanceName)
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{
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IdeController controller = new IdeController(resources, instanceName);
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controller.ResetController();
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IdeConfig! ideConfigHandle = controller.ideConfigHandle;
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if (ideConfigHandle.UseDma) {
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ideConfigHandle.BusMasterDma = new BusMasterDma(ideConfigHandle);
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controller.busMasterDmaAvailable = true;
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controller.ControllerNameInternal =
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String.Format("controller at 0x{0:x4},BM@0x{1:x4},IRQ={2}",
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ideConfigHandle.CommandBase,
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ideConfigHandle.DmaBase,
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ideConfigHandle.Interrupt);
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//
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// Set up Interrupt handling
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//
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ideConfigHandle.CommandEndEvent = new AutoResetEvent(false);
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ideConfigHandle.IdentifyEndEvent = new AutoResetEvent(false);
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ideConfigHandle.Irq = (!)ideConfigHandle.Interrupt.IrqAtOffset(0);
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ideConfigHandle.Irq.RegisterInterrupt();
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controller.irqWorker = new Thread(new ThreadStart(controller.IrqWorkerMain));
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controller.irqWorkerStop = false;
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controller.irqWorker.Start();
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controller.initialized = true;
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}
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else {
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controller.busMasterDmaAvailable = false;
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controller.ControllerNameInternal = String.Format("PIO IDE controller at 0x{0:x4},{1:x4}",
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ideConfigHandle.CommandBase, ideConfigHandle.ControlBase);
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}
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return controller;
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}
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public void Initialize()
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{
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Tracing.Log(Tracing.Debug,"Ide Controller Bus: initialize");
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}
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public void Finalize()
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{
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try {
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irqWorkerStop = true;
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ideConfigHandle.Irq.Pulse(); // Wake up irqWorker
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irqWorker.Join();
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ideConfigHandle.Irq.ReleaseInterrupt();
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}
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finally {
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}
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}
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public void ResetController()
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{
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bool iflag = Processor.DisableInterrupts();
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try {
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// Post the software reset bit
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WriteControlPort(ATA6.DeviceControlSRST);
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// a 5ns delay is needed after issuing the reset and before
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// issuing the next command
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int spin = delay400ns * 30;
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Tracing.Log(Tracing.Debug," spin value for 5 microSeconds ="+spin);
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Thread.SpinWait(spin);
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WriteControlPort(0);
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//the spec says you need to wait 2ms here.
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// my experience has been > 100ms are needed to recognize Seagate drives
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Thread.Sleep(TimeSpan.FromMilliseconds(125));
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if (!PollBSY(false)) {
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Tracing.Log(Tracing.Debug,
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"IDE Controller: controller Reset Aborted, No Drives Present or responding.\n");
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}
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FindDisks();
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}
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finally {
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Processor.RestoreInterrupts(iflag);
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}
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} //resetcontroller
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private void FindDisks()
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{
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// Device 0 now must post to the Error Register
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byte errorBits;
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errorBits = ReadErrorPort();
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//Tracing.Log(Tracing.Debug,"IDE controller: controller Reset finished, Error reg: 0x{0:x2}\n", errorBits);
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DebugStub.Print(" IDE Reset: {0:x2}\n", __arglist(errorBits));
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if ((errorBits & 0x1) > 0 && ReadLBALowPort() == 1 ) {
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DebugStub.Print(" IDE Master Signature {0:x2} {1:x2}\n",
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__arglist(ReadLBAMidPort(), ReadLBAHighPort()));
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if (ReadLBAMidPort() == 0 && ReadLBAHighPort() == 0) {
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DebugStub.Print(" IDE Found Master Disk\n");
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ideDisk1Config = new IdeDiskConfig(ideConfigHandle, 0, instanceName, false);
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//SOSP hack
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DiskDriverControl.SetMasterDiskConfig(ideDisk1Config);
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}
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else if (ReadLBAMidPort() == 0x14 && ReadLBAHighPort() == 0xEB) {
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DebugStub.Print(" IDE Found Master ATAPI16 Device\n");
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ideDisk1Config = new IdeDiskConfig(ideConfigHandle, 0, instanceName, true);
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//SOSP hack
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DiskDriverControl.SetMasterDiskConfig(ideDisk1Config);
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}
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else {
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DebugStub.Print(" IDE Unknown Master Signature {0:x2} {1:x2}\n",
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__arglist(ReadLBAMidPort(), ReadLBAHighPort()));
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Tracing.Log(Tracing.Debug,"IDEcontroller: Master device has unknown signature 0x{0:x2} 0x{1:x2}.\n",
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(UIntPtr) ReadLBAMidPort(), (UIntPtr) ReadLBAHighPort());
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}
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}
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else {
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DebugStub.Print("IDEcontroller: Master is missing\n");
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Tracing.Log(Tracing.Debug,"IDEcontroller: Master is missing");
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}
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|
||
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//
|
||
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// Slave Device
|
||
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//
|
||
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|
||
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SelectDevice(1, false);
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||
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if (!PollDRDY(true)) {
|
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DebugStub.Print("IDEcontroller: Slave is missing\n");
|
||
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Tracing.Log(Tracing.Debug,"IdeController: Slave is missing");
|
||
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return;
|
||
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}
|
||
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if (ReadSectorCountPort() == 1 && ReadLBALowPort() == 1) {
|
||
|
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if ((errorBits & 0x80) != 0) {
|
||
|
|
Tracing.Log(Tracing.Debug,"IdeController: Slave device reports failure.\n");
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
DebugStub.Print(" IDE Slave Signature {0:x2} {1:x2}\n",
|
||
|
|
__arglist(ReadLBAMidPort(), ReadLBAHighPort()));
|
||
|
|
if (ReadLBAMidPort() == 0 && ReadLBAHighPort() == 0) {
|
||
|
|
DebugStub.Print(" IDE Found Slave Disk\n");
|
||
|
|
ideDisk2Config = new IdeDiskConfig(ideConfigHandle, 1, instanceName, false);
|
||
|
|
//SOSP hack
|
||
|
|
DiskDriverControl.SetSlaveDiskConfig(ideDisk2Config);
|
||
|
|
}
|
||
|
|
else if (ReadLBAMidPort() == 0x14 && ReadLBAHighPort() == 0xEB) {
|
||
|
|
DebugStub.Print(" IDE Found Slave ATAPI16 Device\n");
|
||
|
|
ideDisk2Config = new IdeDiskConfig(ideConfigHandle, 1, instanceName, true);
|
||
|
|
//SOSP hack
|
||
|
|
DiskDriverControl.SetSlaveDiskConfig(ideDisk2Config);
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
DebugStub.Print(" IDE Unknown Slave Signature {0:x2} {1:x2}\n",
|
||
|
|
__arglist(ReadLBAMidPort(), ReadLBAHighPort()));
|
||
|
|
Tracing.Log(Tracing.Debug,"Controller: Slave device has unknown signature 0x{0:x2} 0x{1:x2}.\n",
|
||
|
|
(UIntPtr) ReadLBAMidPort(), (UIntPtr) ReadLBAHighPort());
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
DebugStub.Print("IDEcontroller: Slave is missing\n");
|
||
|
|
Tracing.Log(Tracing.Debug,"IdeController: Slave is missing.\n");
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
private void IrqWorkerMain()
|
||
|
|
{
|
||
|
|
Tracing.Log(Tracing.Audit, "Start of worker thread.");
|
||
|
|
byte status;
|
||
|
|
int countSpurious = 0;
|
||
|
|
while (irqWorkerStop == false) {
|
||
|
|
ideConfigHandle.Irq.WaitForInterrupt();
|
||
|
|
|
||
|
|
bool iflag = Processor.DisableInterrupts();
|
||
|
|
bool doNotAck = false;
|
||
|
|
#if DEBUG_SHARED_IRQ
|
||
|
|
//Tracing.Log(Tracing.Debug, "Interrupt signaled.");
|
||
|
|
#endif // DEBUG_SHARED_IRQ
|
||
|
|
try {
|
||
|
|
|
||
|
|
Tracing.Log(Tracing.Debug,"wakeup {0:x}",
|
||
|
|
ideConfigHandle.BusMasterDma.InterruptHigh() ? (UIntPtr) 1 : (UIntPtr) 0 );
|
||
|
|
|
||
|
|
//
|
||
|
|
// "The IDE Driver is required to do a read of the [BM] controller status
|
||
|
|
// register after receiving an interrupt. If the status register returns with the
|
||
|
|
// Interrupt bit set then the driver knows the IDE device generated the interrupt
|
||
|
|
// (important for shared interrupts)"
|
||
|
|
|
||
|
|
if (!ideConfigHandle.BusMasterDma.InterruptHigh()) {
|
||
|
|
//DebugStub.Break();
|
||
|
|
doNotAck = true ;
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
if (CatchBug) {
|
||
|
|
Tracing.Log(Tracing.Debug,"CatchCount ={0}",(UIntPtr) CatchCount);
|
||
|
|
if (CatchCount-- <= 0) {
|
||
|
|
//DebugStub.Break();
|
||
|
|
CatchBug = false;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
status = ReadStatusPort();
|
||
|
|
if ((status & 0x1) > 0 ) {
|
||
|
|
Tracing.Log(Tracing.Debug,"ERROR: status={0}",(UIntPtr) status);
|
||
|
|
DebugStub.Break(); //error
|
||
|
|
}
|
||
|
|
if (((status & (byte)ATA6.IdeStatus.DRDY) == 0) ||
|
||
|
|
((status & (byte)ATA6.IdeStatus.ERR) != 0) )
|
||
|
|
{
|
||
|
|
ATA6.DebugQueryStatus(this);
|
||
|
|
}
|
||
|
|
|
||
|
|
//Tracing.Log(Tracing.Debug," IrqW status {0:x}",(UIntPtr) status);
|
||
|
|
ideConfigHandle.BusMasterDma.Disarm();
|
||
|
|
|
||
|
|
if (GetCommandPending()) {
|
||
|
|
SetCommandPending(false);
|
||
|
|
ideConfigHandle.CommandEndEvent.Set();
|
||
|
|
//Tracing.Log(Tracing.Debug,"setting CommandEndEvent");
|
||
|
|
}
|
||
|
|
else if (GetIdentifyInProgress()) {
|
||
|
|
SetIdentifyInProgress(false);
|
||
|
|
ideConfigHandle.IdentifyEndEvent.Set();
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
Tracing.Log(Tracing.Debug,
|
||
|
|
" Spurious IDE interrupt on {0}\n",
|
||
|
|
ControllerNameInternal);
|
||
|
|
if ( countSpurious++ > 50) {
|
||
|
|
DebugStub.Break();
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
finally {
|
||
|
|
if (!doNotAck) {
|
||
|
|
ideConfigHandle.Irq.AckInterrupt();
|
||
|
|
#if DEBUG_SHARED_IRQ
|
||
|
|
Tracing.Log(Tracing.Debug,"ACKing {0}",
|
||
|
|
ControllerNameInternal);
|
||
|
|
#endif //DEBUG_SHARED_IRQ
|
||
|
|
}
|
||
|
|
else {
|
||
|
|
#if DEBUG_SHARED_IRQ
|
||
|
|
Tracing.Log(Tracing.Debug,"NACKing {0}",
|
||
|
|
ControllerNameInternal);
|
||
|
|
#endif //DEBUG_SHARED_IRQ
|
||
|
|
}
|
||
|
|
Processor.RestoreInterrupts(iflag);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|
||
|
|
public bool PollBSY(bool level)
|
||
|
|
{
|
||
|
|
Delay400ns();
|
||
|
|
|
||
|
|
// FIXFIX PollLoopCount is a somewhat arbitrary number
|
||
|
|
// > 2000 is needed to make SET_FEATURES work on real HW
|
||
|
|
for (int i = 0; i < PollLoopCount; i++) {
|
||
|
|
pollStatus = ReadStatusPort();
|
||
|
|
if (level && (pollStatus & (byte)ATA6.IdeStatus.BSY) > 0) {
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
if (!level && (pollStatus & (byte)ATA6.IdeStatus.BSY) == 0) {
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
Tracing.Log(Tracing.Debug," BSY failed to post in 400ns");
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
public bool PollDRDY(bool level)
|
||
|
|
{
|
||
|
|
// FIXFIX PollLoopCount is a somewhat arbitrary number
|
||
|
|
// > 2000 is needed to make SET_FEATURES work on real HW
|
||
|
|
// level, true = high (1), false = low (0)
|
||
|
|
for (int i = 0; i < PollLoopCount; i++)
|
||
|
|
{
|
||
|
|
byte pollStatus = ReadStatusPort();
|
||
|
|
if (level && (pollStatus & (byte)ATA6.IdeStatus.DRDY) > 0) {
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
if (!level && (pollStatus & (byte)ATA6.IdeStatus.DRDY) == 0) {
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
Tracing.Log(Tracing.Debug," DRDY failed to post in 400ns");
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
public bool PollDRQ(bool level)
|
||
|
|
{
|
||
|
|
// level, true = high (1), false = low (0)
|
||
|
|
|
||
|
|
Delay400ns();
|
||
|
|
|
||
|
|
pollStatus = ReadStatusPort();
|
||
|
|
if (level && (pollStatus & (byte)ATA6.IdeStatus.DRQ) > 0) {
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
if (!level && (pollStatus & (byte)ATA6.IdeStatus.DRQ) == 0) {
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
Tracing.Log(Tracing.Debug," DRQ failed to post in 400ns");
|
||
|
|
return false;
|
||
|
|
}
|
||
|
|
|
||
|
|
public const byte IDE_FEATURE_ENABLE_WRITE_CACHE = 0x02; // Enable write caching.
|
||
|
|
public const byte IDE_FEATURE_SET_TRANSFER_MODE = 0x03; // Set the transfer mode.
|
||
|
|
public const byte IDE_FEATURE_ENABLE_READ_AHEAD = 0xAA; // Enable read look ahead.
|
||
|
|
public const byte IDE_FEATURE_DISABLE_READ_AHEAD = 0x55; // Disable read look ahead.
|
||
|
|
public const byte IDE_FEATURE_DISABLE_DEFAULTS = 0x66; // Disable revert to defaults on reset.
|
||
|
|
|
||
|
|
public const byte IDE_MODE_SET_PIO_FLOW_CONTROL = 0x08; // page 176
|
||
|
|
public const byte IDE_MODE_SET_ULTRA_DMA = 0x40; // page 176
|
||
|
|
|
||
|
|
|
||
|
|
public bool IssueSet(IdeSet setType, ref IdentifyDeviceInformation ident)
|
||
|
|
{
|
||
|
|
ushort usFullStatus;
|
||
|
|
byte nMode =0;
|
||
|
|
|
||
|
|
bool iflag = Processor.DisableInterrupts();
|
||
|
|
if (!PollBSY(false)) {
|
||
|
|
ATA6.DebugQueryStatus(this);
|
||
|
|
DebugStub.Break();
|
||
|
|
}
|
||
|
|
try {
|
||
|
|
switch (setType)
|
||
|
|
{
|
||
|
|
case IdeSet.IDE_SET_MULTIPLE:
|
||
|
|
//AddTrace(GetPC(), ReadFullStatus());
|
||
|
|
//WriteSectorCountPort(m_nMaxBlockTransfer);
|
||
|
|
break;
|
||
|
|
|
||
|
|
case IdeSet.IDE_SET_MAX_UDMA:
|
||
|
|
nMode = (byte)((ident.UltraDmaSupported) ?
|
||
|
|
ident.HighestUltraDmaMode : (byte) 0);
|
||
|
|
WriteFeaturesPort(IDE_FEATURE_SET_TRANSFER_MODE);
|
||
|
|
WriteSectorCountPort((byte)(IDE_MODE_SET_ULTRA_DMA | nMode));
|
||
|
|
WriteCommandPort((byte)ATA6.IdeCommand.SetFeature);
|
||
|
|
break;
|
||
|
|
|
||
|
|
case IdeSet.IDE_SET_READ_AHEAD:
|
||
|
|
//AddTrace(GetPC(), ReadFullStatus());
|
||
|
|
WriteFeaturesPort(IDE_FEATURE_ENABLE_READ_AHEAD);
|
||
|
|
break;
|
||
|
|
|
||
|
|
case IdeSet.IDE_UNSET_READ_AHEAD:
|
||
|
|
//AddTrace(GetPC(), ReadFullStatus());
|
||
|
|
WriteFeaturesPort(IDE_FEATURE_DISABLE_READ_AHEAD);
|
||
|
|
break;
|
||
|
|
|
||
|
|
case IdeSet.IDE_SET_WRITE_CACHE:
|
||
|
|
//AddTrace(GetPC(), ReadFullStatus());
|
||
|
|
WriteFeaturesPort(IDE_FEATURE_ENABLE_WRITE_CACHE);
|
||
|
|
break;
|
||
|
|
|
||
|
|
case IdeSet.IDE_SET_NO_REVERT:
|
||
|
|
//AddTrace(GetPC(), ReadFullStatus());
|
||
|
|
WriteFeaturesPort(IDE_FEATURE_DISABLE_DEFAULTS);
|
||
|
|
break;
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
WriteCommandPort((byte)ATA6.IdeCommand.SetFeature);
|
||
|
|
if (!PollBSY(false)) {
|
||
|
|
ATA6.DebugQueryStatus(this);
|
||
|
|
DebugStub.Break();
|
||
|
|
}
|
||
|
|
byte status1 = ReadStatusPort();
|
||
|
|
Tracing.Log(Tracing.Debug,"status={0}",(UIntPtr)status1);
|
||
|
|
}
|
||
|
|
finally {
|
||
|
|
Processor.RestoreInterrupts(iflag);
|
||
|
|
}
|
||
|
|
|
||
|
|
return true;
|
||
|
|
}
|
||
|
|
|
||
|
|
public void Delay400ns()
|
||
|
|
{
|
||
|
|
Thread.SpinWait(delay400ns);
|
||
|
|
}
|
||
|
|
|
||
|
|
public void SelectDevice(int device, bool atapi)
|
||
|
|
{
|
||
|
|
// REVIEW should we be caching the last setting to avoid
|
||
|
|
// lots of io port reading/writing?
|
||
|
|
byte val = 0;
|
||
|
|
|
||
|
|
if (device > 0) {
|
||
|
|
val = ATA6.DriveSelect;
|
||
|
|
}
|
||
|
|
if (atapi) {
|
||
|
|
val |= (byte) ATA6.IdeCommand.AtapiPacket;
|
||
|
|
}
|
||
|
|
// REVIEW what is the minimum requirement ?
|
||
|
|
//PollBSY(false); // wait for bus to be idle
|
||
|
|
WriteDeviceHeadPort(val);
|
||
|
|
//PollBSY(false); // wait for bus to be idle
|
||
|
|
}
|
||
|
|
|
||
|
|
// This doesn't work, need to fix it some how.
|
||
|
|
public SortedList Enumerate()
|
||
|
|
{
|
||
|
|
SortedList found = new SortedList();
|
||
|
|
if (ideDisk1Config != null) {
|
||
|
|
found.Add("/Disk1", ideDisk1Config);
|
||
|
|
}
|
||
|
|
if (ideDisk2Config != null) {
|
||
|
|
found.Add("/Disk2", ideDisk2Config);
|
||
|
|
}
|
||
|
|
return found;
|
||
|
|
}
|
||
|
|
|
||
|
|
private static int CalculateDelay400nsCount()
|
||
|
|
{
|
||
|
|
ulong cyclesPerSecond = (ulong)Processor.CyclesPerSecond;
|
||
|
|
ulong cycleCountStart;
|
||
|
|
ulong cycleCountEnd;
|
||
|
|
int spinCount = 1000;
|
||
|
|
|
||
|
|
bool iflag = Processor.DisableInterrupts();
|
||
|
|
try {
|
||
|
|
cycleCountStart = Processor.CycleCount;
|
||
|
|
Thread.SpinWait(spinCount);
|
||
|
|
cycleCountEnd = Processor.CycleCount;
|
||
|
|
}
|
||
|
|
finally {
|
||
|
|
Processor.RestoreInterrupts(iflag);
|
||
|
|
}
|
||
|
|
|
||
|
|
ulong cycles = cycleCountEnd - cycleCountStart;
|
||
|
|
ulong iCount = cycles / (ulong)spinCount;
|
||
|
|
ulong cp100NS = cyclesPerSecond / 10000000; //cycles per 100ns
|
||
|
|
if (cp100NS < 1) {
|
||
|
|
DebugStub.Print(" slow machine!! setting cp100NS to 1 \n");
|
||
|
|
cp100NS = 1;
|
||
|
|
}
|
||
|
|
|
||
|
|
int delay400nsCount = (int) ((cp100NS/iCount) *4); //loop iterations needed for 400ns
|
||
|
|
if (delay400nsCount < 100 ) {
|
||
|
|
//delay400nsCount = 100; //FIXFIX: hack for VPC; CycleCount is not virtual!
|
||
|
|
DebugStub.Print(" VPC: setting delay400 spin count to {0}\n",
|
||
|
|
__arglist(delay400nsCount));
|
||
|
|
}
|
||
|
|
|
||
|
|
// now check
|
||
|
|
iflag = Processor.DisableInterrupts();
|
||
|
|
ulong s = Processor.CycleCount;
|
||
|
|
Thread.SpinWait(delay400nsCount);
|
||
|
|
ulong e = Processor.CycleCount;
|
||
|
|
Processor.RestoreInterrupts(iflag);
|
||
|
|
|
||
|
|
DebugStub.Print(" CyclesPerSecond={0}, cyclesPer100ns={1},cyclesPerLoop={2} Delay loopCount={3}\n",
|
||
|
|
__arglist((ulong)cyclesPerSecond,
|
||
|
|
(ulong)cp100NS,
|
||
|
|
(ulong)iCount,
|
||
|
|
(ulong)delay400nsCount));
|
||
|
|
|
||
|
|
DebugStub.Print(" delay400 took {0} instructions or ~{1} nanoseconds\n",
|
||
|
|
__arglist((ulong)(e-s),
|
||
|
|
(ulong)(((e-s)/cp100NS))* 100 ));
|
||
|
|
|
||
|
|
return delay400nsCount;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
}
|