200 lines
10 KiB
C#
200 lines
10 KiB
C#
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///////////////////////////////////////////////////////////////////////////////
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//
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// Microsoft Research Singularity
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//
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// Copyright (c) Microsoft Corporation. All rights reserved.
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//
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// File: TulipConstants.cs
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//
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// Simple Driver for DEC 21140a PCI Ethernet card (as used in Virtual PC).
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//
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// Useful reference URLs:
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// http://www.intel.com/design/network/manuals/21140ahm.pdf
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//
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namespace Microsoft.Singularity.Drivers.Network.Tulip
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{
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internal struct RDES0
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{
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internal const uint OWN = 1u << 31; // Own Bit
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internal const uint FF = 1u << 30; // Filtering Fail
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internal const int FL_ROLL = 16; // Frame length
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internal const uint FL_MASK = 0x3fff;
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internal const uint ES = 1u << 15; // Error Summary
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internal const uint DE = 1u << 14; // Descriptor Error
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internal const uint DT_S = 0u << 12; // Data type (serial)
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internal const uint DT_I = 1u << 12; // Data type (int/loopback)
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internal const uint DT_E = 2u << 12; // Data type (ext/loopback)
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internal const uint RF = 1u << 11; // Runt Frame
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internal const uint MF = 1u << 10; // Multicast Frame
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internal const uint FS = 1u << 9; // First Descriptor
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internal const uint LS = 1u << 8; // Last Descriptor
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internal const uint TL = 1u << 7; // Frame Too Long
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internal const uint CS = 1u << 6; // Collision Seen
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internal const uint FT = 1u << 5; // Frame Type
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internal const uint RW = 1u << 4; // Receive Watchdog
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internal const uint RE = 1u << 3; // Report MII Error
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internal const uint DB = 1u << 2; // Dribbling Bit
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internal const uint CE = 1u << 1; // CRC Error
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internal const uint ZER = 1u << 0; // Zero Length
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}
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internal struct RDES1
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{
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internal const uint RER = 1u << 25; // Receive End of Ring
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internal const uint RCH = 1u << 24; // Second address chained
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internal const uint RBS_MASK = 0x000007ff;
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internal const int RBS2_ROLL = 11;
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}
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internal struct TDES0
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{
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internal const uint OWN = 1u << 31; // Own Bit
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internal const uint ES = 1u << 15; // Error Summary
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internal const uint TO = 1u << 14; // Transmit Jabber Timeout
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internal const uint LO = 1u << 11; // Loss of Carrier
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internal const uint NC = 1u << 10; // No Carrier
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internal const uint LC = 1u << 9; // Late Collision
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internal const uint EC = 1u << 8; // Excessive Collisions
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internal const uint HF = 1u << 7; // Heartbeat fail
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internal const int CC_ROLL = 3; // Collision Count
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internal const uint CC_MASK = 0xf;
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internal const uint LF = 1u << 2; // Link Fail Report
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internal const uint UF = 1u << 1; // Underflow Error
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internal const uint DE = 1u << 0; // Deferred
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internal const uint SETUP_DONE = 0x7fffffff; // Filtering frame done
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}
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internal struct TDES1
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{
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internal const uint IC = 1u << 31; // Interrupt on Completion
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internal const uint LS = 1u << 30; // Last Segment
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internal const uint FS = 1u << 29; // First Segment
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internal const uint FT1 = 1u << 22; // Filtering type:0
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internal const uint SET = 1u << 27; // Setup Packet
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internal const uint TER = 1u << 25; // Transmit end of ring
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internal const uint TCH = 1u << 24; // Second Address chained
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internal const uint DPD = 1u << 23; // Disabled Padding
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internal const uint FT0 = 1u << 22; // Filtering type:1
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internal const uint FT_PERFECT = 0; // Perfect filtering
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internal const uint FT_HASH = FT0; // Hash filtering
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internal const uint FT_INVERSE = FT1; // Inverse filtering
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internal const uint FT_HASH_ONLY = FT1 | FT0;
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internal const uint TBS_MASK = 0x000007ff;
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internal const int TBS2_ROLL = 11;
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}
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internal struct CSR0
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{
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internal const uint WIE = 1u << 24; // Write and Invalidate En.
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internal const uint RLE = 1u << 23; // Read Line Enable
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internal const uint RME = 1u << 21; // Read Multiple Enable
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internal const uint DBO = 1u << 20; // Descriptor Byte Ordering
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internal const int TAP_ROLL = 17; // Transmit Auto. Polling
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internal const uint TAP_MASK = 0x7;
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internal const int CAL_ROLL = 14; // Cache Alignment
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internal const uint CAL_MASK = 0x3;
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internal const int PBL_ROLL = 8; // Programmable burst len
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internal const uint PBL_MASK = 0x1f;
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internal const int DSL_ROLL = 2; // Descriptor Skip len
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internal const uint BAR = 1u << 1; // Bus Arbitration
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internal const uint SWR = 1u << 0; // Software Reset
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}
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internal struct CSR5
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{
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internal const int VALID = 0x0fffffff;
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internal const int EB_ROLL = 23; // Error bits
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internal const uint EB_MASK = 0x7;
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internal const uint EB = EB_MASK << EB_ROLL;
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internal const int TS_ROLL = 20; // Transmit Process State
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internal const uint TS_MASK = 0x7;
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internal const int RS_ROLL = 17; // Receive Process State
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internal const uint RS_MASK = 0x7;
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internal const uint NIS = 1u << 16; // Normal Interrupt Summary
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internal const uint AIS = 1u << 15; // Abnormal Interrupt Summary
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internal const uint ERI = 1u << 14; // Early Receive Interrupt
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internal const uint FBE = 1u << 13; // Fatal Bus Error
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internal const uint GTE = 1u << 11; // General Purpose Timer
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internal const uint ETI = 1u << 10; // Early Transmit Interrupt
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internal const uint RWT = 1u << 9; // Receive Watchdog Timeout
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internal const uint RPS = 1u << 8; // Receive Process Stopped
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internal const uint RU = 1u << 7; // Receive Buffer Unavail.
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internal const uint RI = 1u << 6; // Receive Interrupt
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internal const uint UNF = 1u << 5; // Transmit Underflow
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internal const uint TJT = 1u << 3; // Transmit Jabber Timeout
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internal const uint TU = 1u << 2; // Transmit Buffer Unavail.
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internal const uint TPS = 1u << 1; // Transmit Process Stopped
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internal const uint TI = 1u << 0; // Transmit Interrupt
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internal const uint INTERRUPTS = 0x6fef;
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}
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internal struct CSR6
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{
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internal const uint SC = 1u << 31; // Special capture
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internal const uint RA = 1u << 30; // Receive All
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internal const uint MBO = 1u << 25; // Must Be One
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internal const uint SCR = 1u << 24; // Scrambler Mode
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internal const uint PCS = 1u << 23; // PCS Function
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internal const uint TTM = 1u << 22; // Transmit Threshold Mode
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internal const uint SF = 1u << 21; // Store and Forward
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internal const uint HBD = 1u << 19; // Heartbeat Disable
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internal const uint PS = 1u << 18; // Port Select
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internal const uint CA = 1u << 17; // Capture Effect Enable
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internal const int TR_ROLL = 14; // Threshold Control Bits
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internal const uint TR_MASK = 0x3;
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internal const uint ST = 1u << 13; // Start/Stop Transmit
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internal const uint FC = 1u << 12; // Force Collision Mode
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internal const uint OME = 1u << 11; // Operating Mode (ex/loop)
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internal const uint OMI = 1u << 10; // Operating Mode (in/loop)
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internal const uint FD = 1u << 9; // Full-Duplex Mode
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internal const uint PM = 1u << 7; // Pass All Multicast
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internal const uint PR = 1u << 6; // Promiscuous Mode
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internal const uint SB = 1u << 5; // Start/Stop Backoff
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internal const uint IF = 1u << 4; // Inverse Filtering (RO)
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internal const uint PB = 1u << 3; // Pass Bad Frames
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internal const uint HO = 1u << 2; // Hash-Only Filtering (RO)
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internal const uint SR = 1u << 1; // Start/Stop Receive
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internal const uint HP = 1u << 0; // Hash/Perfect Recv (RO)
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}
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internal struct CSR7
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{
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internal const uint NI = 1u << 16; // Normal Interrupts
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internal const uint AI = 1u << 15; // Abnormal Interrupts too
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internal const uint ALL = CSR5.INTERRUPTS; // All Interrupt bits
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internal const uint ERE = 1 << 14; // Early Receive Enable
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internal const uint FBE = 1 << 13; // Fatal Bus Error Enable
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internal const uint GPT = 1 << 11; // GP Timer Enable
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internal const uint ETE = 1 << 10; // Early TX Interrupt
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internal const uint RW = 1 << 9; // RX Watchdog Timeout
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internal const uint RS = 1 << 8; // RX Stop Enable
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internal const uint RU = 1 << 7; // RX Buffer Unavailable En
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internal const uint RI = 1 << 6; // RX Interrupt Enable
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internal const uint UN = 1 << 5; // TX Underflow Interrupt
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internal const uint TJ = 1 << 3; // TX Jabber Timeout enable
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internal const uint TU = 1 << 2; // TX Buffer Unavailable
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internal const uint TS = 1 << 1; // TX Stop Enable
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internal const uint TI = 1 << 0; // TX Interrupt Enable
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}
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internal struct CSR9
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{
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internal const uint MDI = 1u << 19; // MII Mgmt data in
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internal const uint MII = 1u << 18; // MII Mgmt opt mode (set = rd)
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internal const uint MDO = 1u << 17; // MII Mgmt write data
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internal const uint MDC = 1u << 16; // MII Mgmt clock
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}
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/// <summary> Filtering types from table 4-8 in 21143ahm.pdf</summary>
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internal enum FilteringType : byte
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{
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Perfect = 1,
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Hash = 2,
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Inverse = 3,
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HashOnly = 4,
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MinValue = Perfect,
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MaxValue = HashOnly
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}
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}
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