173 lines
7.1 KiB
NASM
173 lines
7.1 KiB
NASM
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;
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;;; Microsoft Research Singularity
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;;;
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;;; Copyright (c) Microsoft Corporation. All rights reserved.
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;;;
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;;; This file contains ARM-specific assembly code.
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;;;
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; __dtoi double precision floating point to signed integer convert
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;
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; Input: r1 - Most significant word of the double to be converted
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; r0 - Least significant word of the double to be converted
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;
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; Output: r1 - Converted double in signed integer format
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;
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; Local storage size and offsets
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LOC_SIZE EQU 0x18
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OrgOp1h EQU 0x14
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OrgOp1l EQU 0x10
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ExDResl EQU 0x08
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NewResl EQU 0x10
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GET fpe.asm
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GET kxarm.inc
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AREA |.text|, CODE, READONLY
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Export __dtoi
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IMPORT FPE_Raise
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NESTED_ENTRY __dtoi
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EnterWithLR_16
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STMFD sp!, {lr} ; Save return address
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SUB sp, sp, #LOC_SIZE ; Allocate stack space
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PROLOG_END
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STR r1, [sp, #OrgOp1h] ; Save off original args in case of exception
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ORRS r12, r0, r1, LSL #1 ; Check for zero
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STR r0, [sp, #OrgOp1l] ; Save off original args in case of exception
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ADDEQ sp, sp, #LOC_SIZE ; Restore stack and return
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IF Interworking :LOR: Thumbing
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LDMEQFD sp!, {lr} ; if zero (r0 already zero)
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BXEQ lr
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ELSE
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LDMEQFD sp!, {pc} ; if zero (r0 already zero)
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ENDIF
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MOVS r2, r1, LSL #1 ; Right justify exponent, save sign bit in C
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MOV r1, r1, LSL #11 ; Left justify mantissa
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ORR r1, r1, r0, LSR #21 ; ..
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; ..
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MOV r0, r0, LSL #11 ; ..
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ORR r1, r1, #1 << 31 ; Insert hidden one (even for denorms)
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BCS _ffix_negative ; If negative input, separate case
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MOV r3, #DExp_bias+1 ; r3 = 31 + DExp_bias
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ADD r3, r3, #30 ; ..
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SUBS r2, r3, r2, LSR #21 ; Determine shift amount
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BLE shift_left ; Negative shift is a shift left, NaN,
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; or INF; zero shift is an overflow
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CMP r2, #32 ; See if shifting all bits out
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BGE shift_right_32 ; If shifting all bits out, return zero
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shift_right
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RSB r3, r2, #32 ; Check for inexact
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ORRS r12, r0, r1, LSL r3 ; ..
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MOV r0, r1, LSR r2 ; Shift the result
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MOVNE r3, #INX_bit ; Set inexact if inexact
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MOVEQ r3, #0 ; Otherwise set to no exceptions
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B __dtoi_return ; Return
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shift_left
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RSB r2, r2, #0 ; Get left shift amount
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CMP r2, #32 ; If >= 32, shift by moving words, and
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MOVGE r1, r0 ; adjusting shift amount
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MOVGE r0, #0 ; ..
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SUBGE r2, r2, #32 ; ..
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MOV r1, r1, LSL r2 ; Perform rest of shift
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RSB r2, r2, #32 ; ..
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ORR r0, r1, r0, LSR r2 ; ..
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MOV r3, #IVO_bit ; Overflow so set invalid operation
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B __dtoi_return ; Return
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shift_right_32 ; 0.0 < abs(Arg) < 1.0, so losing all bits
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BIC r3, r3, #IVO_bit ; Ensure invalid is clear
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MOV r3, #INX_bit ; Set inexact
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MOV r0, #0 ; Return zero
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B __dtoi_return ; Return
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_ffix_negative
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MOV r3, #DExp_bias+1 ; r3 = 31 + DExp_bias
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ADD r3, r3, #30 ; ..
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SUBS r2, r3, r2, LSR #21 ; Determine shift amount
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BLT shift_left_neg ; Negative shift is a shift left, NaN,
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; or INF; zero shift is an overflow
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BEQ special_int_min ; Special case of INT_MIN
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CMP r2, #32 ; See if shifting all bits out
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BGE shift_right_32 ; If shifting all bits out, return zero
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shift_right_neg
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RSB r3, r2, #32 ; Check for inexact
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ORRS r12, r0, r1, LSL r3 ; ..
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MOV r0, r1, LSR r2 ; Shift the result
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RSB r0, r0, #0 ; Negate result
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MOVNE r3, #INX_bit ; Set inexact if inexact
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MOVEQ r3, #0 ; Otherwise set to no exceptions
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B __dtoi_return ; Return
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shift_left_neg
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RSB r2, r2, #0 ; Get left shift amount
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CMP r2, #32 ; If >= 32, shift by moving words, and
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MOVGE r1, r0 ; adjusting shift amount
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MOVGE r0, #0 ; ..
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SUBGE r2, r2, #32 ; ..
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MOV r1, r1, LSL r2 ; Perform rest of shift
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RSB r2, r2, #32 ; ..
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ORR r0, r1, r0, LSR r2 ; ..
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RSB r0, r0, #0 ; Negate result
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MOV r3, #IVO_bit ; Have a negative so invalid
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B __dtoi_return ; Return
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special_int_min
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TEQ r1, #0x80000000 ; Result == INT_MIN
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MOVNE r3, #IVO_bit ; If not, overflow so raise invalid,
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RSBNE r0, r1, #0 ; negate and move result into place,
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BNE __dtoi_return ; and return
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CMP r0, #0 ; If is, okay, check for inexact
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MOVNE r3, #INX_bit ; If bits lost in low word, inexact
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MOVEQ r3, #0 ; Otherwise, no exceptions
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MOV r0, r1 ; Move result into place
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__dtoi_return
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TST r3, #FPECause_mask ; Any exceptions?
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ADDEQ sp, sp, #LOC_SIZE ; If not, pop off saved arg and
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IF Interworking :LOR: Thumbing
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LDMEQFD sp!, {lr} ; return
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BXEQ lr
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ELSE
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LDMEQFD sp!, {pc} ; return
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ENDIF
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ORR r1, r3, #_FpDToI ; Exception information
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LDR r3, [sp, #OrgOp1h] ; Original operand 1
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LDR r2, [sp, #OrgOp1l] ; ..
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STR r0, [sp, #ExDResl] ; Store default result
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ADD r0, sp, #NewResl ; Pointer to new result
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CALL FPE_Raise ; Handle exception information
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IF Thumbing :LAND: :LNOT: Interworking
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CODE16
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bx pc ; switch back to ARM mode
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nop
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CODE32
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ENDIF
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LDR r0, [sp, #NewResl] ; Load new result
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ADD sp, sp, #LOC_SIZE ; Pop off exception record and result
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IF Interworking :LOR: Thumbing
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LDMFD sp!, {lr} ; Return
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BX lr
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ELSE
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LDMFD sp!, {pc} ; Return
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ENDIF
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ENTRY_END __dtoi
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END
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