388 lines
15 KiB
C#
388 lines
15 KiB
C#
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///////////////////////////////////////////////////////////////////////////////
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//
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// Microsoft Research Singularity
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//
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// Copyright (c) Microsoft Corporation. All rights reserved.
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//
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// Note:
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// System Resource Affinity Table (SRAT)
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// Page 123 of ACPI 3.0 Spec.
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// Also see: "Static Resource Affinity Table" at www.microsoft.com
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namespace Microsoft.Singularity.Hal.Acpi
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{
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using System;
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using Microsoft.Singularity.Io;
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public class Srat
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{
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public const string Signature = "SRAT";
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private const int ProcessorStructureId = 0;
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private const int MemoryStructureId = 1;
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private int [] processorOffsets;
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private int [] memoryOffsets;
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private IoMemory region;
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private SystemTableHeader header;
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public int GetNumberOfProcessors()
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{
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return processorOffsets.Length;
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}
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public int GetNumberOfMemories()
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{
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return memoryOffsets.Length;
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}
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// Processor fields offsets (important fields marked with XX)
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// -----------------------------------------------------------
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// Entry offsets byte length
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// -----------------------------------------------------------
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// Type : 0
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// Length : 1
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// Proximity Domain L : 2 XX
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// APIC ID : 3 XX
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// Flags : 4 XX
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// Local SAPIC EID : 8
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// Proximity Domain H : 9
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// Reserved : 12
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public uint GetProcessorDomain(int processorIndex)
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{
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int offset = processorOffsets[processorIndex];
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uint domain = 0;
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domain = domain + region.Read8(offset+9) << 24;
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domain = domain + region.Read8(offset+10) << 16;
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domain = domain + region.Read8(offset+11) << 8;
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domain = domain + region.Read8(offset+2);
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return domain;
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}
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public uint GetProcessorApicId(int processorIndex)
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{
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return region.Read8(processorOffsets[processorIndex]+3);
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}
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public uint GetProcessorFlagIgnore(int processorIndex)
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{
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uint flags = region.Read32(processorOffsets[processorIndex]+4);
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return (flags & 0x1);
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}
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// Memory fields offsets (important fields marked with XX)
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// -----------------------------------------------------------
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// Entry offsets byte length
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// -----------------------------------------------------------
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// Type : 0
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// Length : 1
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// Proximity Domain : 2 XX
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// Reserved : 6
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// Base Address Low : 8 XX
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// Base Address High : 12 XX
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// Length Low : 16 XX
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// Length High : 20 XX
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// Reserved : 24
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// Flags : 28 XX
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// Reserved : 32
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public uint GetMemoryDomain(int memoryIndex)
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{
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return (region.Read32(memoryOffsets[memoryIndex]+2));
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}
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public ulong GetMemoryBaseAddress(int memoryIndex)
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{
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int offset = memoryOffsets[memoryIndex];
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uint baseHigh = region.Read32(offset+12);
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uint baseLow = region.Read32(offset+8);
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ulong baseAddr = (((ulong)baseHigh) << 32) + baseLow;
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return baseAddr;
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}
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public ulong GetMemoryEndAddress(int memoryIndex)
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{
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ulong baseAddr = GetMemoryBaseAddress(memoryIndex);
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ulong memSize = GetMemorySize(memoryIndex);
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return baseAddr+memSize;
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}
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public ulong GetMemorySize(int memoryIndex)
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{
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int offset = memoryOffsets[memoryIndex];
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uint lenHigh = region.Read32(offset+20);
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uint lenLow = region.Read32(offset+16);
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ulong memSize = (((ulong)lenHigh) << 32) + lenLow;
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return memSize;
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}
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public uint GetMemoryFlagIgnore(int memoryIndex)
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{
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uint flags = region.Read32(memoryOffsets[memoryIndex]+28);
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return (flags & 0x1);
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}
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public uint GetMemoryFlagHotPluggable(int memoryIndex)
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{
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uint flags = region.Read32(memoryOffsets[memoryIndex]+28);
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return (flags & 0x2);
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}
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public uint GetMemoryFlagNonVolatile(int memoryIndex)
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{
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uint flags = region.Read32(memoryOffsets[memoryIndex]+28);
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return (flags & 0x4);
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}
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public Srat(IoMemory region, SystemTableHeader header)
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{
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this.region = region;
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this.header = header;
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}
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// Create() Srat
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public static Srat Create(SystemTableHeader header)
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{
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return new Srat(
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IoMemory.MapPhysicalMemory(
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header.PostHeaderAddress, header.PostHeaderLength,
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true, false
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),
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header
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);
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}
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// Parse Srat structure
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public void ParseSratStructure()
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{
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int offset = 12; // there are 12 bytes offset
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int processorCount = 0;
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int memoryCount = 0;
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int type,length;
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// 1st stage, count the number of processors
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// reset counter
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while (offset < region.Length) {
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type = region.Read8(offset);
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// this is a processor structure
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if (type == ProcessorStructureId) {
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length = region.Read8(offset+1);
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processorCount++;
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offset += length;
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}
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// this is a memory structure
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else if (type == MemoryStructureId) {
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length = region.Read8(offset+1);
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memoryCount++;
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offset += length;
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}
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else {
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DebugStub.Print(" ERROR: Impossible Srat Id\n");
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DebugStub.Break();
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break;
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}
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}
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// 2nd stage, create arrays
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processorOffsets = new int [processorCount];
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memoryOffsets = new int [memoryCount];
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// 3rd stage: fill the offsets
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// clear everything first
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offset = 12;
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processorCount = 0;
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memoryCount = 0;
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while (offset < region.Length) {
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type = region.Read8(offset);
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// this is a processor structure
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if (type == ProcessorStructureId) {
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length = region.Read8(offset+1);
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processorOffsets[processorCount] = offset;
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processorCount++;
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offset += length;
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}
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// this is a memory structure
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else if (type == MemoryStructureId) {
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length = region.Read8(offset+1);
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memoryOffsets[memoryCount] = offset;
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memoryCount++;
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offset += length;
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}
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else {
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DebugStub.Print(" ERROR: Impossible Srat Id\n");
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DebugStub.Break();
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break;
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}
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}
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}
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// Dump Srat structure
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public void DumpSratOffsets()
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{
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DebugStub.Print("\n\n\n SRAT Offset Details: \n");
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DebugStub.Print("------------------------------------\n");
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DebugStub.Print(" {0} processors, {1} memories \n",
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__arglist(processorOffsets.Length,
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memoryOffsets.Length));
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DebugStub.Print(" P Offset -- ");
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for (int i = 0; i < processorOffsets.Length; i++) {
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DebugStub.Print("{0} ", __arglist(processorOffsets[i]));
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}
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DebugStub.Print("\n");
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DebugStub.Print(" M Offset -- ");
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for (int i = 0; i < memoryOffsets.Length; i++) {
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DebugStub.Print("{0} ", __arglist(memoryOffsets[i]));
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}
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DebugStub.Print("\n\n\n");
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}
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// Dump Srat Important fields
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public void DumpSratImportantFields()
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{
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DebugStub.Print("\n\n\n SRAT Important Fields: \n");
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DebugStub.Print("------------------------------------\n");
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for (int i = 0; i < processorOffsets.Length; i++) {
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DebugStub.Print(" PROCESSOR {0}\n",
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__arglist(i));
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DebugStub.Print(" Domain : {0}\n",
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__arglist(GetProcessorDomain(i)));
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DebugStub.Print(" APIC ID : {0}\n",
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__arglist(GetProcessorApicId(i)));
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DebugStub.Print(" Ignore : {0}\n",
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__arglist(GetProcessorFlagIgnore(i)));
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}
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for (int i = 0; i < memoryOffsets.Length; i++) {
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DebugStub.Print(" MEMORY {0}\n",
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__arglist(i));
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DebugStub.Print(" Domain : {0}\n",
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__arglist(GetMemoryDomain(i)));
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DebugStub.Print(" Base : {0} KB\n",
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__arglist(GetMemoryBaseAddress(i)/1024));
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DebugStub.Print(" End : {0} KB\n",
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__arglist(GetMemoryEndAddress(i)/1024));
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DebugStub.Print(" MemSize : {0} KB\n",
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__arglist(GetMemorySize(i)/1024));
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DebugStub.Print(" Ignore : {0}\n",
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__arglist(GetMemoryFlagIgnore(i)));
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DebugStub.Print(" HotPlug : {0}\n",
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__arglist(GetMemoryFlagHotPluggable(i)));
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DebugStub.Print(" NonVol : {0}\n",
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__arglist(GetMemoryFlagNonVolatile(i)));
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}
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DebugStub.Print("\n\n\n");
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}
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// Dump Srat structure
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public void DumpSratStructure()
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{
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int offset = 12; // there are 12 bytes offset
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int processorCount = 0;
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int memoryCount = 0;
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int type,length;
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// fields
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uint ptype, plen, pdom, pid, pflag, peid, pdom2, pres;
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uint mtype, mlen, mdom, mres, mlow, mhigh, mlenl, mlenh;
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uint mres2, mflag, mres3;
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DebugStub.Print(" Region length {0}\n",
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__arglist(region.Length));
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DebugStub.Print("------------------------------------\n");
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// reset counter
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while (offset < region.Length) {
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// this is a processor structure
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type = region.Read8(offset);
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if (type == ProcessorStructureId) {
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length = region.Read8(offset+1);
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DebugStub.Print("\n proc:{0} \n",
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__arglist(processorCount, length));
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DebugStub.Print("------------------------------------\n");
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ptype = region.Read8 (offset);
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plen = region.Read8 (offset+1);
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pdom = region.Read8 (offset+2);
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pid = region.Read8 (offset+3);
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pflag = region.Read32(offset+4);
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peid = region.Read8 (offset+8);
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pdom2 = region.Read32(offset+9);
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pres = region.Read32(offset+12);
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DebugStub.Print(" ptype: {0}\n", __arglist(ptype));
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DebugStub.Print(" plen : {0}\n", __arglist(plen ));
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DebugStub.Print(" pdom : {0}\n", __arglist(pdom ));
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DebugStub.Print(" pid : {0}\n", __arglist(pid ));
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DebugStub.Print(" pflag: {0}\n", __arglist(pflag));
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DebugStub.Print(" peid : {0}\n", __arglist(peid ));
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DebugStub.Print(" pdom2: {0}\n", __arglist(pdom2));
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DebugStub.Print(" pres : {0}\n", __arglist(pres ));
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processorCount++;
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offset += length;
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}
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// this is a memory structure
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else if (type == MemoryStructureId) {
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length = region.Read8(offset+1);
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DebugStub.Print("\n memr:{0} \n",
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__arglist(memoryCount, length));
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DebugStub.Print("------------------------------------\n");
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mtype = region.Read8 (offset);
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mlen = region.Read8 (offset+1);
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mdom = region.Read32(offset+2);
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mres = region.Read8 (offset+6);
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mlow = region.Read32(offset+8);
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mhigh = region.Read32(offset+12);
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mlenl = region.Read32(offset+16);
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mlenh = region.Read32(offset+20);
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mres2 = region.Read32(offset+24);
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mflag = region.Read32(offset+28);
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mres3 = region.Read32(offset+32);
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DebugStub.Print(" mtype: {0}\n", __arglist(mtype));
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DebugStub.Print(" mlen : {0}\n", __arglist(mlen ));
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DebugStub.Print(" mdom : {0}\n", __arglist(mdom ));
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DebugStub.Print(" mres : {0}\n", __arglist(mres ));
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DebugStub.Print(" mlow : {0}\n", __arglist(mlow ));
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DebugStub.Print(" mhigh: {0}\n", __arglist(mhigh));
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DebugStub.Print(" mlenl: {0}\n", __arglist(mlenl));
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DebugStub.Print(" mlenh: {0}\n", __arglist(mlenh));
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DebugStub.Print(" mres2: {0}\n", __arglist(mres2));
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DebugStub.Print(" mflag: {0}\n", __arglist(mflag));
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DebugStub.Print(" mres3: {0}\n", __arglist(mres3));
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memoryCount++;
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offset += length;
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}
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else {
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DebugStub.Print(" Error \n");
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DebugStub.Print("Impossible Affinity Structure Id\n");
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DebugStub.Break();
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break;
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}
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}
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DebugStub.Print("------------------------------------\n");
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DebugStub.Print(" Done Parsing Srat Structure ... \n");
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DebugStub.Print(" Found {0} processors and {1} memory\n",
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__arglist(processorCount,memoryCount));
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|
|
}
|
||
|
|
}
|
||
|
|
}
|