395 lines
12 KiB
C#
395 lines
12 KiB
C#
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//////////////////////////////////////////////////////////////////////////////////////////////////
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//
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// Microsoft Research Singularity
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//
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// Copyright (c) Microsoft Corporation. All rights reserved.
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//
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// This file defines an architecture-neutral encapsulation of the state which is saved
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// during a thread context switch.
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using System;
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using System.Runtime.InteropServices;
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using System.Runtime.CompilerServices;
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#if ISA_IX
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using Microsoft.Singularity.Isal.IX;
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#elif ISA_ARM
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using Microsoft.Singularity.Isal.Arm;
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#endif
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namespace Microsoft.Singularity.Isal
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{
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// SpillContext holds the CPU state which is local to a thread. Note this
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// is a subset of the entire CPU context, as some of the context does not
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// change from thread to thread.
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[NoCCtor]
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[AccessedByRuntime("referenced in c++", AllFields = true)]
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[CLSCompliant(false)]
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[StructLayout(LayoutKind.Sequential)]
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[StructAlign(16)]
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public struct SpillContext
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{
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#if ISA_IX
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///////////////////////////////////////////////////////////////////////////
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// ISA_IX86 Context
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//
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// Integer registers
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//
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public UIntPtr ax;
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public UIntPtr bx;
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public UIntPtr cx;
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public UIntPtr dx;
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public UIntPtr di;
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public UIntPtr si;
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#if ISA_IX64
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public UIntPtr r8;
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public UIntPtr r9;
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public UIntPtr r10;
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public UIntPtr r11;
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public UIntPtr r12;
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public UIntPtr r13;
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public UIntPtr r14;
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public UIntPtr r15;
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#endif
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//
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// Control registers
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//
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public UIntPtr sp;
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public UIntPtr ip;
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public UIntPtr bp;
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public UIntPtr fl;
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//
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// Mmx context. Note that this must be 16-byte aligned.
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//
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internal MmxContext mmx;
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// We always store cs even though it never changes in non-paging builds,
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// since it simplifies the context switching code. Also note we
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// don't store any other segments because they either the same as cs (ss, ds, es) or
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// never change (fs, gs)
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public UIntPtr cs;
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#if PAGING
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//
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// Page table base
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//
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public UIntPtr cr3;
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#endif
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#elif ISA_ARM
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///////////////////////////////////////////////////////////////////////////
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// Arm Context
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//
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// Unbanked integer and control registers.
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//
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public uint r0;
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public uint r1;
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public uint r2;
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public uint r3;
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public uint r4;
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public uint r5;
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public uint r6;
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public uint r7;
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public uint r8;
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public uint r9;
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public uint r10;
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public uint r11;
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public uint r12;
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public uint pc; // aka r15
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//
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// Banked control Registers
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//
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public uint sp; // aka r13
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public uint lr; // aka r14
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//
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// Processor status register.
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//
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public uint cpsr;
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#endif
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//
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// Extra (unrestored) context information from InterruptContext.
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//
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#if ISA_ARM
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public uint instruction;
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#endif
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///////////////////////////////////////////////////////////////////////////
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// Common fields
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public const int ContentsSpilled = 0x00000001;
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// Stack limit is stored as part of the spill context.
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public UIntPtr stackLimit;
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// Field for storing various flags about the state of the spill.
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public int spillFlags;
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///////////////////////////////////////////////////////////////////////////
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// Properties - these are ISA-neutral ways to access common aspects of the
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// spill context.
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public UIntPtr InstructionPointer
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{
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[NoHeapAllocation]
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get {
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#if ISA_IX
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return ip;
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#elif ISA_ARM
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return pc;
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#endif
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}
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[NoHeapAllocation]
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set {
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#if ISA_IX
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ip = value;
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#elif ISA_ARM
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pc = (uint)value;
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#endif
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}
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}
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public UIntPtr StackPointer
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{
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[NoHeapAllocation]
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get {
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return sp;
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}
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}
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public UIntPtr FramePointer
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{
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[NoHeapAllocation]
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get {
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#if ISA_IX
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return bp;
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#elif ISA_ARM
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return r11; // ?
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#endif
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}
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}
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public UIntPtr Flags
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{
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[NoHeapAllocation]
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get {
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#if ISA_IX
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return fl;
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#elif ISA_ARM
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return cpsr;
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#endif
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}
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}
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// IsSpilled indicates whether or not the context is in a spilled state - that is,
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// whether the context represents a swapped-out thread (as opposed to the state
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// where the thread is running.)
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//
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// This flag is set every time we save the context, and cleared when it is restored.
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public bool IsSpilled
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{
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[NoHeapAllocation]
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get {
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return (spillFlags & ContentsSpilled) != 0;
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}
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}
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[NoHeapAllocation]
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public unsafe void Trace()
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{
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#if ISA_IX86
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Tracing.Log(Tracing.Debug, "eax={0:x8} ebx={1:x8} ecx={2:x8} edx={3:x8}\n",
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ax, bx, cx, dx);
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Tracing.Log(Tracing.Debug, "esp={0:x8} ebp={1:x8} esi={2:x8} edi={3:x8}\n",
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sp, bp, si, di);
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Tracing.Log(Tracing.Debug, "eip={0:x8} efl={1:x8}\n", ip, fl);
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#elif ISA_IX64
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Tracing.Log(Tracing.Debug, "rax={0:x16} rbx={1:x16} rcx={2:x16} rdx={3:x16}\n",
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ax, bx, cx, dx);
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Tracing.Log(Tracing.Debug, "rsp={0:x16} rbp={1:x16} rsi={2:x16} rdi={3:x16}\n",
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sp, bp, si, di);
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Tracing.Log(Tracing.Debug, "r8={0:x16} r9={1:x16} r10={2:x16} r11={3:x16}\n",
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r8, r9, r10, r11);
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Tracing.Log(Tracing.Debug, "r12={0:x16} r13={1:x16} r14={2:x16} r15={3:x16}\n",
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r12, r13, r14, r15);
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Tracing.Log(Tracing.Debug, "rip={0:x16} rfl={1:x16}\n",
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ip, fl);
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#elif ISA_ARM
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Tracing.Log(Tracing.Debug, "r0={0:x8} r1={1:x8} r2={2:x8} r3={3:x8}\n",
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(UIntPtr) r0, (UIntPtr) r1, (UIntPtr) r2, (UIntPtr) r3);
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Tracing.Log(Tracing.Debug, "r4={0:x8} r5={1:x8} r6={2:x8} r7={3:x8}\n",
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(UIntPtr) r4, (UIntPtr) r5, (UIntPtr) r6, (UIntPtr) r7);
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Tracing.Log(Tracing.Debug, "r8={0:x8} r9={1:x8} r10={2:x8} r11={3:x8}\n",
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(UIntPtr) r8, (UIntPtr) r9, (UIntPtr) r10, (UIntPtr) r11);
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Tracing.Log(Tracing.Debug, "r12={0:x8} sp={1:x8} lr={2:x8} pc={3:x8}\n",
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(UIntPtr) r12, (UIntPtr) sp, (UIntPtr) lr, (UIntPtr) pc);
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Tracing.Log(Tracing.Debug, "cpsr={0:x8}\n", (UIntPtr) cpsr);
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#endif
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}
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[NoHeapAllocation]
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public unsafe void Display()
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{
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#if ISA_IX86
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DebugStub.WriteLine(" eax={0:x8} ebx={1:x8} ecx={2:x8} edx={3:x8}",
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__arglist(ax, bx, cx, dx));
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DebugStub.WriteLine(" esp={0:x8} ebp={1:x8} esi={2:x8} edi={3:x8}",
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__arglist(sp, bp, si, di));
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DebugStub.WriteLine(" eip={0:x8} efl={1:x8}",
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__arglist(ip, fl));
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#elif ISA_IX64
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DebugStub.WriteLine(" rax={0:x16} rbx={1:x16} rcx={2:x16} rdx={3:x16}",
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__arglist(ax, bx, cx, dx));
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DebugStub.WriteLine(" rsp={0:x16} rbp={1:x16} rsi={2:x16} rdi={3:x16}",
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__arglist(sp, bp, si, di));
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DebugStub.WriteLine(" r8={0:x16} r9={1:x16} r10={2:x16} r11={3:x16}",
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__arglist(r8, r9, r10, r11));
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DebugStub.WriteLine(" r12={0:x16} r13={1:x16} r14={2:x16} r15={3:x16}",
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__arglist(r12, r13, r14, r15));
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DebugStub.WriteLine(" rip={0:x16} rfl={1:x16}",
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__arglist(ip, fl));
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#elif ISA_ARM
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DebugStub.WriteLine(" r0={0:x8} r1={1:x8} r2={2:x8} r3={3:x8}",
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__arglist(r0, r1, r2, r3));
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DebugStub.WriteLine(" r4={0:x8} r5={1:x8} r6={2:x8} r7={3:x8}",
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__arglist(r4, r5, r6, r7));
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DebugStub.WriteLine(" r8={0:x8} r9={1:x8} r10={2:x8} r11={3:x8}",
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__arglist(r8, r9, r10, r11));
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DebugStub.WriteLine(" r12={0:x8} sp={1:x8} lr={2:x8} pc={3:x8}",
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__arglist(r12, sp, lr, pc));
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DebugStub.WriteLine(" psr={0:x8}", __arglist(cpsr));
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#endif
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}
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#if SINGULARITY_KERNEL
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///////////////////////////////////////////////////////////////////////////
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// Methods
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[AccessedByRuntime("defined in asm")]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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public extern unsafe bool Save();
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[AccessedByRuntime("defined in asm")]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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public extern unsafe bool Save(InterruptContext *interrupt);
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[AccessedByRuntime("defined in asm")]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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public extern unsafe void Resume();
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[AccessedByRuntime("called from C++")]
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[CLSCompliant(false)]
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[NoHeapAllocation]
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public unsafe void Initialize(UIntPtr stack, UIntPtr stackLimit,
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UIntPtr start, int threadIndex, UIntPtr cr3)
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{
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#if ISA_IX
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UIntPtr *sp = (UIntPtr *) stack;
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*--sp = 0;
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*--sp = 0;
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this.bp = (uint) (UIntPtr) sp;
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this.sp = (uint) (UIntPtr) sp;
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this.ip = (uint) start;
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this.cs = (uint) Isa.GetCs();
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this.cx = (uint) threadIndex;
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this.fl = EFlags.IF;
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// If we are allowed (i.e. the kernel is ring 0), set IO priveleges in the context
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if ((Isa.GetCs() & 0x3) == 0) {
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this.fl |= EFlags.IOPL; // TODO: get rid of IOPL
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}
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this.fl = EFlags.IF;
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this.mmx.fcw = 0x037f;
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this.mmx.ftw = 0;
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// mmx.mxcsr = 0x1f80;
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this.stackLimit = stackLimit;
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#if PAGING
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this.cr3 = cr3;
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#endif
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#elif ISA_ARM
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this.sp = (uint) stack;
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this.r11 = (uint) stack;
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this.pc = (uint) start;
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this.r0 = (uint) threadIndex;
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this.cpsr = ProcessorMode.System;
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this.stackLimit = stackLimit;
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#endif
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// Mark thread as having valid contents
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this.spillFlags = ContentsSpilled;
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}
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[AccessedByRuntime("defined in asm")]
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[CLSCompliant(false)]
|
||
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
||
|
|
[GCAnnotation(GCOption.NOGC)]
|
||
|
|
[StackBound(32)]
|
||
|
|
[NoHeapAllocation]
|
||
|
|
public extern unsafe static void ResetCurrent();
|
||
|
|
|
||
|
|
#endif // SINGULARITY_KERNEL
|
||
|
|
|
||
|
|
};
|
||
|
|
}
|