190 lines
7.5 KiB
NASM
190 lines
7.5 KiB
NASM
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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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;;;
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;;; Microsoft Research Singularity
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;;;
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;;; Copyright (c) Microsoft Corporation. All rights reserved.
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;;;
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;;; Assembly code for Isal.Isa class
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CODE32
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AREA |.text|, CODE, ARM
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|defining ?g_GetCurrentThread@Class_Microsoft_Singularity_Isal_Isa@@SAPAUStruct_Microsoft_Singularity_Isal_ThreadRecord@@XZ| EQU 1
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|defining ?g_GetCurrentCpu@Class_Microsoft_Singularity_Isal_Isa@@SAPAUStruct_Microsoft_Singularity_Isal_CpuRecord@@XZ| EQU 1
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|defining ?g_InitializeCurrentThread@Class_Microsoft_Singularity_Isal_Isa@@SAXPAUStruct_Microsoft_Singularity_Isal_ThreadRecord@@@Z| EQU 1
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|defining ?g_SetCurrentThread@Class_Microsoft_Singularity_Isal_Isa@@SAXPAUStruct_Microsoft_Singularity_Isal_ThreadRecord@@@Z| EQU 1
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|defining ?g_InitializeCurrentCpu@Class_Microsoft_Singularity_Isal_Isa@@SAXPAUStruct_Microsoft_Singularity_Isal_CpuRecord@@@Z| EQU 1
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|defining ?c_DefaultReturnFromInterrupt@Class_Microsoft_Singularity_Isal_Isa@@2EA| EQU 1
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|defining ?g_SwitchToInterruptStackAndCallback@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@PAUClass_Microsoft_Singularity_Isal_Isa_ICallback@@PAU2@@Z| EQU 1
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|defining ?g_Halt@Class_Microsoft_Singularity_Isal_Isa@@SAXXZ| EQU 1
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|defining ?g_EnableInterrupts@Class_Microsoft_Singularity_Isal_Isa@@SAXXZ| EQU 1
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|defining ?g_DisableInterrupts@Class_Microsoft_Singularity_Isal_Isa@@SA_NXZ| EQU 1
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|defining ?g_AreInterruptsDisabled@Class_Microsoft_Singularity_Isal_Isa@@SA_NXZ| EQU 1
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|defining ?g_GetCpsr@Class_Microsoft_Singularity_Isal_Isa@@SAIXZ| EQU 1
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|defining ?g_GetFramePointer@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@XZ| EQU 1
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|defining ?g_GetFrameCallerFrame@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@PAU2@@Z| EQU 1
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|defining ?g_GetStackReturnAddresses@Class_Microsoft_Singularity_Isal_Isa@@SAIPAUClassVector_uintPtr@@@Z| EQU 1
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|defining ?g_GetFrameReturnAddress@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@PAU2@@Z| EQU 1
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|defining ?g_GetStackPointer@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@XZ| EQU 1
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include hal.inc
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;;;
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LEAF_ENTRY ?g_GetCpsr@Class_Microsoft_Singularity_Isal_Isa@@SAIXZ
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msr cpsr, r0
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bx lr
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LEAF_END
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LEAF_ENTRY ?g_GetCurrentThread@Class_Microsoft_Singularity_Isal_Isa@@SAPAUStruct_Microsoft_Singularity_Isal_ThreadRecord@@XZ
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GET_THREAD_FIELD_ADDR r0, r12, #0
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bx lr
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LEAF_END
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LEAF_ENTRY ?g_GetCurrentCpu@Class_Microsoft_Singularity_Isal_Isa@@SAPAUStruct_Microsoft_Singularity_Isal_CpuRecord@@XZ
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GET_CPU_FIELD_ADDR r0, r12, #0
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bx lr
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LEAF_END
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if :DEF:SINGULARITY_KERNEL
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;;;
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;;; void InitializeCurrentThread(ref CpuRecord record)
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;;;
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;;; Set the pointer to the CPU's CpuRecord
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;;;
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;;; mov eax, [?c_currentCpuOffset@Class_Microsoft_Singularity_Isal_Isa@@2HA]
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;;; mov PSEG:[eax], PCX
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;;;
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LEAF_ENTRY ?g_InitializeCurrentThread@Class_Microsoft_Singularity_Isal_Isa@@SAXPAUStruct_Microsoft_Singularity_Isal_ThreadRecord@@@Z
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GET_THREAD_ADDR r1, r12
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str r0, [r1]
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bx lr
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LEAF_END
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LEAF_ENTRY ?g_SetCurrentThread@Class_Microsoft_Singularity_Isal_Isa@@SAXPAUStruct_Microsoft_Singularity_Isal_ThreadRecord@@@Z
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GET_THREAD_ADDR r1, r12
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;; get active stack limit
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ldr r2, [r1]
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ldr r2, [r2, #Struct_Microsoft_Singularity_Isal_ThreadRecord___activeStackLimit]
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;; Set new thread value
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str r0, [r1]
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;; maintain same active stack limit
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str r2, [r0, #Struct_Microsoft_Singularity_Isal_ThreadRecord___activeStackLimit]
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bx lr
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LEAF_END
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LEAF_ENTRY ?g_InitializeCurrentCpu@Class_Microsoft_Singularity_Isal_Isa@@SAXPAUStruct_Microsoft_Singularity_Isal_CpuRecord@@@Z
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GET_CPU_ADDR r1, r12
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str r0, [r1]
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bx lr
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LEAF_END
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LEAF_ENTRY ?c_DefaultReturnFromInterrupt@Class_Microsoft_Singularity_Isal_Isa@@2EA
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bkpt 0xffff
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bx lr
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LEAF_END
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|?g_SwitchToInterruptStackAndCallback@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@PAUClass_Microsoft_Singularity_Isal_Isa_ICallback@@PAU2@@Z| PROC
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;; stack frame
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stmfd sp!, {r11,lr}
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mov r11, sp
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;; Switch to the interrupt stack
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GET_CPU_FIELD_ADDR r2, r12, #Struct_Microsoft_Singularity_Isal_CpuRecord___interruptStackBegin
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ldr sp, [r2]
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GET_CPU_FIELD_ADDR r2, r12, #Struct_Microsoft_Singularity_Isal_CpuRecord___interruptStackLimit
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GET_THREAD_FIELD_ADDR r3, r12, #Struct_Microsoft_Singularity_Isal_ThreadRecord___activeStackLimit
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ldr r2, [r2]
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str r2, [r3]
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bl |?g_DoCallback@Class_Microsoft_Singularity_Isal_Isa_ICallback@@SAPAUuintPtr@@PAU1@PAU2@@Z|
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mov sp, r11
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ldmfd sp!, {r11,lr}
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bx lr
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ENDP
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endif
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LEAF_ENTRY ?g_Halt@Class_Microsoft_Singularity_Isal_Isa@@SAXXZ
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;; DCD 0xe320f003 ;; WFI Note: ARMv7 Specific.
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bx lr
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LEAF_END
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LEAF_ENTRY ?g_EnableInterrupts@Class_Microsoft_Singularity_Isal_Isa@@SAXXZ
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mrs r0, cpsr
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bic r0, r0, #Struct_Microsoft_Singularity_Isal_Arm_Psr_DisableIrq
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msr cpsr_c, r0
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bx lr
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LEAF_END
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LEAF_ENTRY ?g_DisableInterrupts@Class_Microsoft_Singularity_Isal_Isa@@SA_NXZ
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mrs r1, cpsr
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;; remember previous bit for later
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and r0, r1, #Struct_Microsoft_Singularity_Isal_Arm_Psr_DisableIrq
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orr r1, r1, #Struct_Microsoft_Singularity_Isal_Arm_Psr_DisableIrq
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msr cpsr_c, r1
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;; if bit is 1, we return false, so negate the bit with an xor
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eors r0, r0, #Struct_Microsoft_Singularity_Isal_Arm_Psr_DisableIrq
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;; normalize true value
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movne r0, #1
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bx lr
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LEAF_END
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LEAF_ENTRY ?g_AreInterruptsDisabled@Class_Microsoft_Singularity_Isal_Isa@@SA_NXZ
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mrs r0, cpsr
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ands r0, r0, #Struct_Microsoft_Singularity_Isal_Arm_Psr_DisableIrq
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;; normalize true value
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movne r0, #1
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bx lr
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LEAF_END
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;;;
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;;; "public: static struct uintPtr * __cdecl Class_Microsoft_Singularity_Isal_Isa::g_GetStackPointer(void)"
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;;;
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LEAF_ENTRY ?g_GetStackPointer@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@XZ
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mov r0, sp
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bx lr
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LEAF_END
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;;;
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;;; "public: static struct uintPtr * __cdecl Class_Microsoft_Singularity_Isal_Isa::g_GetFramePointer(void)"
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;;;
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LEAF_ENTRY ?g_GetFramePointer@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@XZ
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mov r0, r11
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bx lr
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LEAF_END
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;;;
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;;; "public: static struct uintPtr * __cdecl Class_Microsoft_Singularity_Isal_Isa::g_GetFrameReturnAddress(struct uintPtr *)"
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;;;
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LEAF_ENTRY ?g_GetFrameReturnAddress@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@PAU2@@Z
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mov r0, #0 ; [r0, #0]
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;; ldr r0, [r0, #4]
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bx lr
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LEAF_END
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;;;
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;;; "public: static struct uintPtr * __cdecl Class_Microsoft_Singularity_Isal_Isa::g_GetFrameCallerFrame(struct uintPtr *)"
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;;;
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LEAF_ENTRY ?g_GetFrameCallerFrame@Class_Microsoft_Singularity_Isal_Isa@@SAPAUuintPtr@@PAU2@@Z
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mov r0, #0 ; [r0, #0]
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;; ldr r0, [r0, #0]
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bx lr
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LEAF_END
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END
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