852 lines
31 KiB
C#
852 lines
31 KiB
C#
//////////////////////////////////////////////////////////////////////////////////////////////////
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//
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// Microsoft Research Singularity
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//
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// Copyright (c) Microsoft Corporation. All rights reserved.
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//
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// Isa specifies a standard architecture-neutral interface to the target execution
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// environment required by Singularity. Unlike the HAL there is only a single
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// Isa available at a time (although the Isa implementation changes on different ISA's.)
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//
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// Isa defines a basic framework for interrupt handling and dispatching, which is uniform
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// across HALs.
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//
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// The Isa model is:
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//
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// Each processor has 2 processor-specific records avaiable to it.
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// - The CpuRecord is effectively constant for the processor
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// - The ThreadRecord will be changed by the OS as context switches occur on the processor
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//
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// Pointers to these structures are stored in an architecture-specific, yet well-known,
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// atomic instruction sequence. (Specifically, atomic with respect to processor migration
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// occuring during the sequence.)
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//
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// This sequence is allowed to be parameterized by a runtime constant parameter
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// "offset" (one for each processor and thread.) Values of each offset are
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// provided at init time and may not change. (E.g. on x86 this is an offset from fs:[0].)
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//
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// The target also abstracts ISA-specific interrupt handling and dispatch logic. Each architecture
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// identifies interrupts into one of 3 categories (based on static partitioning of dispatch ids):
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// - Exceptions. These cause the current context to be saved in the CpuRecord, and
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// are dispatched to the debugger infrastructure. (Eventually they will be further
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// handled by additional logic, but this is not in place yet.) Note that exceptions
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// are not currently reentrant.
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// - "Quick" interrupts. These interrupts are intended to be handled by lightweight kernel
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// logic. They cannot trigger context switches and thus do not require full context saves.
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// - Normal interrupts. These cause a context save into the per-thread spill area. The
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// presumption is that execution may resume on a different thread.
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//
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// There needs to be some discipline enforced in terms of priority of these interrupts, but
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// currently there is none. (The current assumption is that normal/quick interrupts
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// are non-reentrant, and exceptions may occur at any time but may not be interrupted. However
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// note that nothing is preventing quick interrupts from interrupting anything but debugging.)
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//
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// The interrupt dispatching logic also manages stack switches. The basic model is that only
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// normal thread execution occurs on growable stacks. Therefore we maintain only a single
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// interrupt stack for all interrupt and exception dispatch - reentrant interrupts simply
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// grow that stack. Note that if we ever overflow the interrupt stack it is a panic situation,
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// but this is the case anyway since we cannot allocate during interrupt processing. Also note
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// that this stack is also suitable for executing application-level stack growth code, since
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// such code cannot run during interrupt time.
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using System;
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using System.Runtime.InteropServices;
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using System.Runtime.CompilerServices;
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using System.Diagnostics;
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#if SINGULARITY_KERNEL
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using Microsoft.Singularity.Hal;
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using HalPlatform = Microsoft.Singularity.Hal.Platform;
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#endif
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#if ISA_IX
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using Microsoft.Singularity.Isal.IX;
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#elif ISA_ARM
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using Microsoft.Singularity.Isal.Arm;
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#endif
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namespace Microsoft.Singularity.Isal
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{
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[NoCCtor]
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[AccessedByRuntime("referenced in c++")]
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[CLSCompliant(false)]
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public class Isa
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{
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[AccessedByRuntime("foo", AllFields=true)]
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public enum Type
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{
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X86,
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X64,
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Arm
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};
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#if ISA_IX86
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public const Type Target = Type.X86;
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#elif ISA_IX64
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public const Type Target = Type.X64;
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#elif ISA_ARM
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public const Type Target = Type.Arm;
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#endif
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////////////////////////////////////////////////////////////////////////
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// Thread-local and cpu-local storage
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//
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// Each ISA sets up an architecure-specific way to access a processor- and thread-specific
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// data segment. To allow flexibility in the implementation of this, the HAL
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// is allowed to parameterize the location where this data is stored (although this
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// offset is interpreted in an ISA-specific way: fs offset on x86, gs offset on
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// x64, etc.) This parameter is generically referred to as the "offset".
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//
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// Note that for each ISA there is a specific well-known assembly sequence, using
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// this offset, to access the thread and processor records. (Architecture-neutral code
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// should use the function call interfaces.)
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////////////////////////////////////////////////////////////////////////
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[AccessedByRuntime("referenced in c++")]
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public static int currentThreadOffset;
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[AccessedByRuntime("referenced in c++")]
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public static int currentCpuOffset;
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[AccessedByRuntime("referenced in c++")]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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public static unsafe extern ThreadRecord *GetCurrentThread();
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[AccessedByRuntime("referenced in c++")]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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public static unsafe extern CpuRecord *GetCurrentCpu();
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#if SINGULARITY_KERNEL
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[AccessedByRuntime("referenced in c++")]
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[CLSCompliant(false)]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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public static unsafe extern void SetCurrentThread(ref ThreadRecord record);
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#endif
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////////////////////////////////////////////////////////////////////////
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// Interrupt stack access
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//
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// This routine allows managed code to be executed on the interrupt stack.
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//
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// This can only be safely accomplished with interrupt disabled.
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// There are two reasons interrupts are required to be disabled here:
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//
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// 1. We must disable interrupts around the narrow window where we are flipping the stack
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// back and forth from the interrupt stack (essentially this must be atomic or the
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// interrupt dispatcher could get confused.)
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//
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// 2. We cannot tolerate a context switch when we are on the interrupt stack.
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//
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// If we ever support leveled interrupts, we may want to disable interrupts for a very
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// narrow window, and separately disable scheduling operations for the longer window.
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////////////////////////////////////////////////////////////////////////
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[AccessedByRuntime("referenced by asm")]
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public abstract class ICallback
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{
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[NoStackLinkCheckTrans]
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internal abstract UIntPtr Callback(UIntPtr param);
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[AccessedByRuntime("referenced by asm")]
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[NoStackLinkCheckTrans]
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private static UIntPtr DoCallback(ICallback pThis, UIntPtr param)
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{
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VTable.Assert(Isa.IsRunningOnInterruptStack);
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return pThis.Callback(param);
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}
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}
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#if SINGULARITY_KERNEL
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[NoStackLinkCheckTrans]
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[NoHeapAllocation]
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public static UIntPtr CallbackOnInterruptStack(ICallback callback, UIntPtr param)
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{
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VTable.Assert(HalPlatform.ThePlatform.AreInterruptsDisabled());
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// Here we assert that we aren't reentering the interrupt stack. This would technically
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// be just fine (we'd just call back immediately), but the check is here because:
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// (a) existing clients currently don't expect this to happen, so it's a sanity check
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// (b) we are participating in an annoying hack where we "discard" the NoHeapAllocation
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// attribute on our callback path through unmanaged code, since stack allocation
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// calls through here and is not annotated properly. Thus we can't directly call
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// the callback here. (@todo: This needs to be fixed.)
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VTable.Assert(!IsRunningOnInterruptStack);
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return SwitchToInterruptStackAndCallback(callback, param);
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}
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[AccessedByRuntime("defined in interrupt.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(16)]
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[NoHeapAllocation]
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public extern static UIntPtr SwitchToInterruptStackAndCallback(ICallback callback,
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UIntPtr param);
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#endif // SINGULARITY_KERNEL
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public static bool IsRunningOnInterruptStack
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{
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[NoHeapAllocation]
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get {
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unsafe {
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return StackLimit == GetCurrentCpu()->interruptStackLimit;
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}
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}
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}
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////////////////////////////////////////////////////////////////////////
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// Direct register access
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////////////////////////////////////////////////////////////////////////
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public static UIntPtr StackLimit
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{
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[NoHeapAllocation]
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get {
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unsafe {
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return GetCurrentThread()->activeStackLimit;
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}
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}
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[NoHeapAllocation]
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set {
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unsafe {
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GetCurrentThread()->activeStackLimit = value;
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}
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}
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}
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#if ISA_ARM
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[NoHeapAllocation]
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[StackBound(32)]
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public static extern uint GetCpsr();
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#endif // ISA_ARM
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#if ISA_IX
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[NoHeapAllocation]
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[StackBound(32)]
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public static extern UIntPtr GetCs();
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#endif // ISA_IX
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(16)]
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[NoHeapAllocation]
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public static extern void WriteMsr(uint offset,ulong value);
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(16)]
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[NoHeapAllocation]
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public static extern ulong ReadMsr(uint offset);
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////////////////////////////////////////////////////////////////////////
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// Specialized instruction support
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////////////////////////////////////////////////////////////////////////
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#if SINGULARITY_KERNEL
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[NoHeapAllocation]
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[StackBound(32)]
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public static extern void Halt();
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#endif // SINGULARITY_KERNEL
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#if ISA_ARM
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[StackBound(32)]
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[NoHeapAllocation]
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internal static extern void EnableCycleCounter();
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#else
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[NoHeapAllocation]
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internal static void EnableCycleCounter()
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{
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}
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#endif
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[StackBound(32)]
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[NoHeapAllocation]
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internal static extern ulong GetCycleCount();
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(16)]
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[NoHeapAllocation]
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public static extern ulong ReadPmc(uint offset);
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(64)]
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[NoHeapAllocation]
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public static extern void ReadCpuid(uint feature,
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out uint v0, out uint v1, out uint v2, out uint v3);
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////////////////////////////////////////////////////////////////////////
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// Basic FPU support
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////////////////////////////////////////////////////////////////////////
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(64)]
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[NoHeapAllocation]
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public static extern void InitFpu();
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(16)]
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[NoHeapAllocation]
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private static extern uint ReadFpuStatus();
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(16)]
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[NoHeapAllocation]
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private static extern void ClearFpuStatus();
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////////////////////////////////////////////////////////////////////////
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// IO space support
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////////////////////////////////////////////////////////////////////////
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#if ISA_IX
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(64)]
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[NoHeapAllocation]
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public static extern int In(ushort port);
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(64)]
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[NoHeapAllocation]
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public static extern void Out(ushort port, int value);
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(64)]
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[NoHeapAllocation]
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public static extern unsafe void RepInS(uint count, ushort port, byte *buffer);
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(64)]
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[NoHeapAllocation]
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public static extern unsafe void RepOutS(uint count, ushort port, byte *buffer);
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#endif // ISA_IX
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////////////////////////////////////////////////////////////////////////
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// Chip-level interrupt enable flag
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////////////////////////////////////////////////////////////////////////
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#if SINGULARITY_KERNEL
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[NoHeapAllocation]
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[StackBound(32)]
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public static extern bool AreInterruptsDisabled();
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[NoHeapAllocation]
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[StackBound(32)]
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internal static extern bool DisableInterrupts();
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[AccessedByRuntime("defined in isa.asm")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[NoHeapAllocation]
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[StackBound(32)]
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internal static extern void EnableInterrupts();
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#endif // SINGULARITY_KERNEL
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////////////////////////////////////////////////////////////////////////
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// Call frame support
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////////////////////////////////////////////////////////////////////////
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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internal static unsafe extern UIntPtr GetFrameReturnAddress(UIntPtr framePointer);
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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internal static unsafe extern UIntPtr GetFrameCallerFrame(UIntPtr framePointer);
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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internal static extern UIntPtr GetStackPointer();
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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internal static extern UIntPtr GetFramePointer();
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// These methods are public and safe to use from any where provided
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// there's at least 2 call frames on the stack.
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[NoHeapAllocation]
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public static UIntPtr GetCallerReturnAddress()
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{
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UIntPtr currentFrame = GetFramePointer();
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UIntPtr callerFrame = GetFrameCallerFrame(currentFrame);
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if (callerFrame == UIntPtr.Zero) {
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return UIntPtr.Zero;
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}
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UIntPtr callersCaller = GetFrameReturnAddress(callerFrame);
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return callersCaller;
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}
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/// <summary>
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/// Provides a mini stack trace starting from the caller of the caller
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/// of this method.
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/// </summary>
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[NoHeapAllocation]
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public static void GetStackReturnAddresses(out UIntPtr pc1, out UIntPtr pc2, out UIntPtr pc3)
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{
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pc1 = UIntPtr.Zero;
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pc2 = UIntPtr.Zero;
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pc3 = UIntPtr.Zero;
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UIntPtr currentFrame = GetFramePointer();
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UIntPtr callerFrame = GetFrameCallerFrame(currentFrame);
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if (callerFrame == UIntPtr.Zero) {
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return;
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}
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pc1 = GetFrameReturnAddress(callerFrame);
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callerFrame = GetFrameCallerFrame(callerFrame);
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if (callerFrame == UIntPtr.Zero) {
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return;
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}
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pc2 = GetFrameReturnAddress(callerFrame);
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callerFrame = GetFrameCallerFrame(callerFrame);
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if (callerFrame == UIntPtr.Zero) {
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return;
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}
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pc3 = GetFrameReturnAddress(callerFrame);
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}
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/// <summary>
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/// Provides the full stack trace starting from the caller of the caller
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/// of this method.
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/// </summary>
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/// <returns>Return address values in stack array from top to bottom</returns>
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[NoHeapAllocation]
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public static uint GetStackReturnAddresses(UIntPtr[] stack)
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{
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uint index;
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if (stack == null) {
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return 0;
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}
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UIntPtr currentFrame = GetFramePointer();
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UIntPtr callerFrame = GetFrameCallerFrame(currentFrame);
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for (index = 0; callerFrame != UIntPtr.Zero && index < stack.Length; index++) {
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stack[index] = GetFrameReturnAddress(callerFrame);
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callerFrame = GetFrameCallerFrame(callerFrame);
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}
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return index;
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}
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////////////////////////////////////////////////////////////////////////
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// Execution mode
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////////////////////////////////////////////////////////////////////////
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[NoHeapAllocation]
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[AccessedByRuntime("foo")]
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internal static bool IsInUserMode()
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{
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#if ISA_IX
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// The bottom two bits of the CS selector are the RPL
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// (requested privilege level) of the selector. If
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// this is 3, we're running in ring3. Otherwise,
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// we're more privileged.
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return (GetCs() & 0x3) == 3;
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#else
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// We don't currently support non-priveleged mode on other archs.
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return false;
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#endif
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}
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#if SINGULARITY_KERNEL
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(32)]
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[NoHeapAllocation]
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internal static extern void EnterUserMode();
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#endif // SINGULARITY_KERNEL
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////////////////////////////////////////////////////////////////////////
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// Chip-level paging support
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////////////////////////////////////////////////////////////////////////
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#if SINGULARITY_KERNEL
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[AccessedByRuntime("foo")]
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[MethodImpl(MethodImplOptions.InternalCall)]
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[GCAnnotation(GCOption.NOGC)]
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[StackBound(16)]
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[NoHeapAllocation]
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public static extern void EnablePaging(uint pdpt);
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|
|
|
[AccessedByRuntime("foo")]
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
|
[GCAnnotation(GCOption.NOGC)]
|
|
[StackBound(16)]
|
|
[NoHeapAllocation]
|
|
public static extern void DisablePaging();
|
|
|
|
[AccessedByRuntime("foo")]
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
|
[GCAnnotation(GCOption.NOGC)]
|
|
[StackBound(16)]
|
|
[NoHeapAllocation]
|
|
public static extern void ChangePageTableRoot(uint pdpt);
|
|
|
|
[AccessedByRuntime("foo")]
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
|
[GCAnnotation(GCOption.NOGC)]
|
|
[StackBound(16)]
|
|
[NoHeapAllocation]
|
|
public static extern UIntPtr GetPageTableRoot();
|
|
|
|
[AccessedByRuntime("foo")]
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
|
[GCAnnotation(GCOption.NOGC)]
|
|
[StackBound(16)]
|
|
[NoHeapAllocation]
|
|
public static extern void InvalidateTLBEntry(UIntPtr pageAddr);
|
|
|
|
#endif // SINGULARITY_KERNEL
|
|
|
|
////////////////////////////////////////////////////////////////////////
|
|
// Interrupt dispatch logic
|
|
////////////////////////////////////////////////////////////////////////
|
|
|
|
public static bool InInterruptContext
|
|
{
|
|
[NoHeapAllocation]
|
|
get {
|
|
unsafe {
|
|
// Note that there is a small window where we haven't switched stacks where this
|
|
// will return false. However this is balanced against the complexity of
|
|
// maintaining a specific flag, especially across context restores operations.
|
|
|
|
// Also note that during normal thread execution there is a small possibility of
|
|
// getting another CPU's interruptStackLimit due to processor migration, but it
|
|
// should not affect the result.
|
|
|
|
return StackLimit == GetCurrentCpu()->interruptStackLimit;
|
|
}
|
|
}
|
|
}
|
|
|
|
#if SINGULARITY_KERNEL
|
|
|
|
// This call signature is a lie - in fact this routine has asm-level
|
|
// calling conventions and will never be called by managed code.
|
|
[AccessedByRuntime("defined in interrupt.asm")]
|
|
public extern static void DispatchVector();
|
|
|
|
// This type is a lie - in fact this is a code fragment. However
|
|
// C# won't let us take the address of code, so we declare it as a byte.
|
|
[AccessedByRuntime("output to header : defined in context.asm")]
|
|
[ExternalStaticData]
|
|
public unsafe static byte DefaultReturnFromInterrupt;
|
|
|
|
// The HAL is also allowed to customize the behavior of the final sequence of resuming
|
|
// a context, since it includes enabling interrupts which is abstracted by the hal.
|
|
// Currently this is specified by an unmanaged code snipped pointer. This code
|
|
// should have identical semantics to [iretd on x86,x64; tbd otherwise.]
|
|
[AccessedByRuntime("referenced in c++")]
|
|
private unsafe static void *returnFromInterrupt;
|
|
|
|
[NoHeapAllocation]
|
|
[AccessedByRuntime("referenced in c++")]
|
|
public static unsafe void SetReturnFromInterruptRoutine(UIntPtr code)
|
|
{
|
|
returnFromInterrupt = (void *) code;
|
|
}
|
|
|
|
// DebuggerDispatch dispatches exceptions to the debugger infrastructure.
|
|
// Eventually this should move to the HAL, as different platforms will
|
|
// have different debugging requiremnts
|
|
|
|
[NoHeapAllocation]
|
|
private static void DispatchDebugger(ref SpillContext context, int exception)
|
|
{
|
|
#if ISA_IX
|
|
// TBD: factor this special case into debugger abstraction
|
|
if (exception == EVectors.Nmi) {
|
|
|
|
if (Microsoft.Singularity.MpExecution.FreezeRequested) {
|
|
|
|
Singularity.MpExecution.FreezeProcessor(ref context);
|
|
|
|
} else {
|
|
|
|
DebugStub.WriteLine("******************* NMI Interrupt **********************\n");
|
|
Singularity.DebugStub.Trap(ref context, exception);
|
|
}
|
|
}
|
|
else {
|
|
// TBD: we should factor the debugger support into the HAL.
|
|
Singularity.DebugStub.Trap(ref context, exception);
|
|
}
|
|
#elif ISA_ARM
|
|
// Fix up pc for some software exceptions, regardless of debugger attachment.
|
|
|
|
if (exception == ExceptionVector.SoftwareInterrupt) {
|
|
// Move pc forward to resume after interrupting instruction.
|
|
if (context.instruction != 0x0efffff01) {
|
|
// Don't move pc forward for debugger-inserted breakpoints.
|
|
context.pc += 4;
|
|
}
|
|
}
|
|
else if (exception == ExceptionVector.UndefinedInstruction) {
|
|
// Move pc forward to resume after interrupting instruction.
|
|
context.pc += 4;
|
|
}
|
|
|
|
// TBD: we should factor the debugger support into the HAL.
|
|
Singularity.DebugStub.Trap(ref context, exception);
|
|
#endif
|
|
|
|
context.Resume();
|
|
}
|
|
|
|
// InterruptDispatch is called by the asm code after saving the context
|
|
// and switching stacks. This routine may return, in which case execution
|
|
// is resumed, or it may call RestoreContext on a new thread.
|
|
|
|
[AccessedByRuntime("referenced in asm")]
|
|
[NoHeapAllocation]
|
|
public static unsafe void DispatchInterrupt(InterruptContext *context)
|
|
{
|
|
#if false
|
|
DebugStub.WriteLine("---------------------------------------------------------------\n");
|
|
DebugStub.WriteLine("DispatchInterrupt (vector={0:x2})", __arglist(context->vector));
|
|
context->Display();
|
|
DebugStub.WriteLine("---------------------------------------------------------------\n");
|
|
#endif
|
|
|
|
// This count is stored in the Singularity Processor object, since that is where singx86
|
|
// looks for it. Need to move at some point.
|
|
Singularity.Processor p = Singularity.Processor.CurrentProcessor;
|
|
if (p != null) {
|
|
p.IncrementInterruptCounts(context->ExceptionId);
|
|
}
|
|
|
|
if (context->IsException()) {
|
|
// All exceptions get reported to the debugger (as first chance.)
|
|
DispatchDebugger(ref GetCurrentCpu()->spill, context->ExceptionId);
|
|
|
|
// TBD: eventually we want to actually have OS logic to do something with
|
|
// hardware exceptions...
|
|
}
|
|
else {
|
|
// Reset context for interrupt code (this affects the fpu)
|
|
// @todo: investigate details here; this seems wrong -SET
|
|
SpillContext.ResetCurrent();
|
|
|
|
HalPlatform.CurrentCpu.DispatchInterrupt(context);
|
|
}
|
|
}
|
|
|
|
#endif // SINGULARITY_KERNEL
|
|
|
|
////////////////////////////////////////////////////////////////////////
|
|
// Initialization
|
|
////////////////////////////////////////////////////////////////////////
|
|
|
|
#if SINGULARITY_KERNEL
|
|
|
|
[NoHeapAllocation]
|
|
[NoStackOverflowCheck]
|
|
[AccessedByRuntime("referenced in c++")]
|
|
public static void Initialize(int cpuRecordOffset, int threadRecordOffset)
|
|
{
|
|
// Fetch the offsets from the HAL
|
|
currentCpuOffset = cpuRecordOffset;
|
|
currentThreadOffset = threadRecordOffset;
|
|
|
|
// Set default return from interrupt routine
|
|
unsafe {
|
|
fixed (byte *p = &DefaultReturnFromInterrupt) {
|
|
returnFromInterrupt = p;
|
|
}
|
|
}
|
|
}
|
|
|
|
[NoHeapAllocation]
|
|
[NoStackOverflowCheck]
|
|
[AccessedByRuntime("referenced in c++")]
|
|
[NoStackLinkCheckTrans]
|
|
public static unsafe void InitializeCpu(CpuRecord *cpu,
|
|
int cpuid,
|
|
UIntPtr stackLimit)
|
|
{
|
|
unsafe {
|
|
cpu->id = cpuid;
|
|
|
|
// Set up active stack limit before we may incurr
|
|
// a linked stack check.
|
|
cpu->bootThread.activeStackLimit = stackLimit;
|
|
|
|
// Initially we just use the current stack for interrupts.
|
|
cpu->interruptStackBegin = 0;
|
|
cpu->interruptStackLimit = stackLimit;
|
|
|
|
InitializeCurrentCpu(ref *cpu);
|
|
|
|
|
|
|
|
InitializeCurrentThread(ref cpu->bootThread);
|
|
}
|
|
}
|
|
|
|
[AccessedByRuntime("referenced in c++")]
|
|
[NoHeapAllocation]
|
|
public static void InitializeDispatchTable()
|
|
{
|
|
#if ISA_IX
|
|
InitializeIdt();
|
|
#elif ISA_ARM
|
|
// Nothing to do as there is no table, just code.
|
|
#endif
|
|
}
|
|
|
|
[AccessedByRuntime("referenced in c++")]
|
|
[NoHeapAllocation]
|
|
public static void InitializeCpuDispatchTable()
|
|
{
|
|
#if ISA_IX
|
|
LoadIdt();
|
|
#elif ISA_ARM
|
|
unsafe {
|
|
UIntPtr sp = GetCurrentCpu()->dispatchStack.StackBegin;
|
|
|
|
// Initialize the sp pointers in the various exception modes
|
|
SetModeSp(ProcessorMode.Fiq, sp);
|
|
SetModeSp(ProcessorMode.Irq, sp);
|
|
SetModeSp(ProcessorMode.Supervisor, sp);
|
|
SetModeSp(ProcessorMode.Abort, sp);
|
|
SetModeSp(ProcessorMode.Undefined, sp);
|
|
}
|
|
LoadResetVector();
|
|
#endif
|
|
}
|
|
|
|
[AccessedByRuntime("referenced in c++")]
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
|
[GCAnnotation(GCOption.NOGC)]
|
|
[StackBound(32)]
|
|
[NoHeapAllocation]
|
|
private static unsafe extern void InitializeCurrentThread(ref ThreadRecord record);
|
|
|
|
[AccessedByRuntime("referenced in c++")]
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
|
[GCAnnotation(GCOption.NOGC)]
|
|
[StackBound(32)]
|
|
[NoHeapAllocation]
|
|
private static unsafe extern void InitializeCurrentCpu(ref CpuRecord record);
|
|
|
|
#endif // SINGULARITY_KERNEL
|
|
|
|
////////////////////////////////////////////////////////////////////////
|
|
// Interrupt table
|
|
////////////////////////////////////////////////////////////////////////
|
|
|
|
#if SINGULARITY_KERNEL
|
|
|
|
#if ISA_IX
|
|
|
|
[AccessedByRuntime("accessed from asm")]
|
|
// BUG: declare this ExternalStaticData since it is not properly aligned by bartok
|
|
[ExternalStaticData]
|
|
public static InterruptTable idt;
|
|
|
|
[AccessedByRuntime("called from C++")]
|
|
[NoHeapAllocation]
|
|
public static void InitializeIdt()
|
|
{
|
|
idt.Initialize();
|
|
}
|
|
|
|
[AccessedByRuntime("defined in interrupt.asm")]
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
|
[NoHeapAllocation]
|
|
[StackBound(32)]
|
|
public static extern void LoadIdt();
|
|
|
|
#endif
|
|
|
|
#if ISA_ARM
|
|
|
|
[AccessedByRuntime("defined in isa.asm")]
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
|
[NoHeapAllocation]
|
|
[StackBound(32)]
|
|
public static extern void SetModeSp(int mode, UIntPtr sp);
|
|
|
|
[AccessedByRuntime("defined in interrupt.asm")]
|
|
[MethodImpl(MethodImplOptions.InternalCall)]
|
|
[NoHeapAllocation]
|
|
[StackBound(32)]
|
|
public static extern void LoadResetVector();
|
|
|
|
#endif // ISARM
|
|
|
|
#endif // SINGULARITY_KERNEL
|
|
|
|
}
|
|
}
|